Hi Alex,
This issue was navi10 specific and was found in May, 2019.
It was early after the asic back, then since gfxoff was removed from navi10, we didn’t really verify which firmware version started to have a fix.
For navi14/navi12, there’s no such issue at all.
Sorry for losing the track of it.
From: Yuan, Xiaojie
Sent: Thursday, October 10, 2019 1:17 AM
To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Xiao, Jack <Jack.Xiao@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Subject: Re: [PATCH 2/2] drm/amd/powerplay: re-enable FW_DSTATE feature bit
For now, gfxoff for navi10 is disabled by default, and I also verified on navi14 with both GFXOFF and FW_DSTATE feature bits toggled on.
Could you help to confirm the firmware version?
What version of firmware has the fix? Was it recently fixed? We should check the version if the old one may be out in the wild.
SMU firmware has fix the bug, so remove this workaround.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@xxxxxxx>
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 44152c1f01c7..3628295469c4 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -359,11 +359,8 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
| FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)
| FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT);
- if (adev->pm.pp_feature & PP_GFXOFF_MASK) {
+ if (adev->pm.pp_feature & PP_GFXOFF_MASK)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT);
- /* TODO: remove it once fw fix the bug */
- *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_FW_DSTATE_BIT);
- }
if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
--
2.20.1
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