RE: [PATCH 4/5] drm/amd/powerplay: add the interfaces for getting and setting profiling dpm clock level

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From: Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx>
Sent: Monday, September 23, 2019 5:29 PM
To: Liang, Prike <Prike.Liang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: arron.liu@xxxxxxx; Huang, Ray <Ray.Huang@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Subject: Re: [PATCH 4/5] drm/amd/powerplay: add the interfaces for getting and setting profiling dpm clock level

 

comment inline.


From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Liang, Prike <Prike.Liang@xxxxxxx>
Sent: Monday, September 23, 2019 4:43 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Cc: arron.liu@xxxxxxx <arron.liu@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>; Liang, Prike <Prike.Liang@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Subject: [PATCH 4/5] drm/amd/powerplay: add the interfaces for getting and setting profiling dpm clock level

 

implement get_profiling_clk_mask and force_clk_levels for forcing dpm clk to limit value.

Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
---
 drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 83 ++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index f87aa56..c6aae1c 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -392,6 +392,87 @@ static int renoir_get_workload_type(struct smu_context *smu, uint32_t profile)
         return pplib_workload;
 }
 
+static int renoir_get_profiling_clk_mask(struct smu_context *smu,
+                                        enum amd_dpm_forced_level level,
+                                        uint32_t *sclk_mask,
+                                        uint32_t *mclk_mask,
+                                        uint32_t *soc_mask)
+{
+
+       if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) {
+               if (sclk_mask)
+                       *sclk_mask = 0;
+       } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) {
+               if (mclk_mask)
+                       *mclk_mask = 0;
+       } else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {
+               if(sclk_mask)
+                       /* The sclk as gfxclk and has three level about max/min/current */
+                       *sclk_mask = 3 - 1;

[kevin]:

you should return the max level not current level.

[Prike] Yeah, the clause will return max dpm level index.

+
+               if(mclk_mask)
+                       *mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1;
+
+               if(soc_mask)
+                       *soc_mask = NUM_SOCCLK_DPM_LEVELS - 1;
+       }
+
+       return 0;
+}
+
+static int renoir_force_clk_levels(struct smu_context *smu,
+                                  enum smu_clk_type clk_type, uint32_t mask)
+{
+
+       int ret = 0 ;
+       uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0;
+       DpmClocks_t *clk_table = smu->smu_table.clocks_table;
+
+       soft_min_level = mask ? (ffs(mask) - 1) : 0;
+       soft_max_level = mask ? (fls(mask) - 1) : 0;
+
+       switch (clk_type) {
+       case SMU_GFXCLK:
+       case SMU_SCLK:
+               ret = smu_get_dpm_freq_range(smu, SMU_GFXCLK, &min_freq, &max_freq);
+               if (ret)
+                       return ret;
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxGfxClk, max_freq);
+               if (ret)
+                       return ret;
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinGfxClk, min_freq);
+               if (ret)
+                       return ret;
+               break;
+       case SMU_SOCCLK:
+               GET_DPM_CUR_FREQ(clk_table, clk_type, soft_min_level, min_freq);
+               GET_DPM_CUR_FREQ(clk_table, clk_type, soft_max_level, max_freq);
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxSocclkByFreq, max_freq);
+               if (ret)
+                       return ret;
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinSocclkByFreq, min_freq);
+               if (ret)
+                       return ret;
+               break;
+       case SMU_MCLK:
+       case SMU_FCLK:
+               GET_DPM_CUR_FREQ(clk_table, clk_type, soft_min_level, min_freq);
+               GET_DPM_CUR_FREQ(clk_table, clk_type, soft_max_level, max_freq);
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxFclkByFreq, max_freq);
+               if (ret)
+                       return ret;
+               ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinFclkByFreq, min_freq);
+               if (ret)
+                       return ret;
+

[kevin]:

after remove this blank line,

Reviewed-by: Kevin Wang <kevin1.wang@xxxxxxx>

+               break;
+       default:
+               break;
+       }
+
+       return ret;
+}
+
 static const struct pptable_funcs renoir_ppt_funcs = {
         .get_smu_msg_index = renoir_get_smu_msg_index,
         .get_smu_table_index = renoir_get_smu_table_index,
@@ -404,6 +485,8 @@ static const struct pptable_funcs renoir_ppt_funcs = {
         .force_dpm_limit_value = renoir_force_dpm_limit_value,
         .unforce_dpm_levels = renoir_unforce_dpm_levels,
         .get_workload_type = renoir_get_workload_type,
+       .get_profiling_clk_mask = renoir_get_profiling_clk_mask,
+       .force_clk_levels = renoir_force_clk_levels,
 };
 
 void renoir_set_ppt_funcs(struct smu_context *smu)
--
2.7.4

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