The patch makes me a little confusing.
According to asic type list,
CHIP_NAVI10, /* 25 */
CHIP_NAVI14, /* 26 */
CHIP_NAVI12, /* 27 */
CHIP_LAST,
before the sdma workaround applies only for Navi10 and Navi14(not Navi12).
However, it seems this patch reverse the logics totally. It applies the workaround only for Navi12.
-----Original Message-----
From: Yuan, Xiaojie <Xiaojie.Yuan@xxxxxxx>
Sent: Monday, September 23, 2019 9:58 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Xiao, Jack <Jack.Xiao@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Quan, Evan <Evan.Quan@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx>; Yuan, Xiaojie <Xiaojie.Yuan@xxxxxxx>
Subject: [PATCH 1/2] drm/amdgpu/gmc10: do not apply the 'invalidation from sdma' workaround for navi12
when gfxoff is enabled, applying this workaround makes sdma hang while entering desktop.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index ed1c3b883f6a..3897e0d28838 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -291,7 +291,8 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
if (!adev->mman.buffer_funcs_enabled ||
!adev->ib_pool_ready ||
- adev->asic_type > CHIP_NAVI14 ||
+ adev->asic_type == CHIP_NAVI10 ||
+ adev->asic_type == CHIP_NAVI14 ||
adev->in_gpu_reset) {
gmc_v10_0_flush_vm_hub(adev, vmid, AMDGPU_GFXHUB_0, 0);
mutex_unlock(&adev->mman.gtt_window_lock);
--
2.20.1
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