Good point, I think we can check ih_info.cb, instead of ras_block, as the check condition. On the other hand, I initialized the header in ih_info in case someone use it in somewhere...
Regards,
Hawking
-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1@xxxxxxx>
Sent: 2019年8月29日 11:52
To: Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Subject: RE: [PATCH 1/7] drm/amdgpu: add helper function to do common ras_late_init
Another way is to add check for ih_info in amdgpu_ras_interrupt_add_handler and amdgpu_ras_interrupt_remove_handler directly.
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Zhou1, Tao
> Sent: 2019年8月29日 10:59
> To: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-
> gfx@xxxxxxxxxxxxxxxxxxxxx; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
> Subject: RE: [PATCH 1/7] drm/amdgpu: add helper function to do common
> ras_late_init
>
>
>
> > -----Original Message-----
> > From: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> > Sent: 2019年8月28日 21:03
> > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhou1, Tao <Tao.Zhou1@xxxxxxx>;
> > Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> > Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
> > Subject: [PATCH 1/7] drm/amdgpu: add helper function to do common
> > ras_late_init
> >
> > In late_init for ras, the helper function will be used to 1).
> > disable ras feature if the IP block is masked as disabled 2). send
> > enable feature command if the ip block was masked as enabled 3).
> > create
> debugfs/sysfs node per IP block 4).
> > register interrupt handler
> >
> > Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 57
> > +++++++++++++++++++++++++++++++++
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4 +++
> > 2 files changed, 61 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > index 230f7e6..2c32f99 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > @@ -1564,6 +1564,63 @@ int amdgpu_ras_init(struct amdgpu_device
> *adev)
> > return -EINVAL;
> > }
> >
> > +/* helper function to handle common stuff in ip late init phase */
> > +int amdgpu_ras_late_init(struct amdgpu_device *adev,
> > + struct ras_common_if *ras_block,
> > + struct ras_fs_if *fs_info,
> > + struct ras_ih_if *ih_info)
> > +{
> > + int r;
> > +
> > + /* disable RAS feature per IP block if it is not supported */
> > + if (!amdgpu_ras_is_supported(adev, ras_block->block)) {
> > + amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0);
> > + return 0;
> > + }
> > +
> > + r = amdgpu_ras_feature_enable_on_boot(adev, ras_block, 1);
> > + if (r) {
> > + if (r == -EAGAIN) {
> > + /* request gpu reset. will run again */
> > + amdgpu_ras_request_reset_on_boot(adev,
> > + ras_block->block);
> > + return 0;
> > + }
> > + /* in resume phase, if fail to enable ras,
> > + * clean up all ras fs nodes, and disable ras */
> > + if (adev->in_suspend)
> > + goto cleanup;
> > + }
> > +
> > + /* in resume phase, no need to create ras fs node */
> > + if (adev->in_suspend)
> > + return 0;
> > +
> > + if (ras_block->block == AMDGPU_RAS_BLOCK__UMC ||
> > + ras_block->block == AMDGPU_RAS_BLOCK__SDMA ||
> > + ras_block->block == AMDGPU_RAS_BLOCK__GFX) {
> [Tao] we can set ih_info to NULL if a ras block has no interrupt and
> change the condition to "if (ih_info)"
>
> > + r = amdgpu_ras_interrupt_add_handler(adev, ih_info);
> > + if (r)
> > + goto interrupt;
> > + }
> > +
> > + amdgpu_ras_debugfs_create(adev, fs_info);
> > +
> > + r = amdgpu_ras_sysfs_create(adev, fs_info);
> > + if (r)
> > + goto sysfs;
> > +
> > + return 0;
> > +cleanup:
> > + amdgpu_ras_sysfs_remove(adev, ras_block);
> > +sysfs:
> > + amdgpu_ras_debugfs_remove(adev, ras_block);
> > + amdgpu_ras_interrupt_remove_handler(adev, ih_info);
> [Tao] lack of if condition
>
> > +interrupt:
> > + amdgpu_ras_feature_enable(adev, ras_block, 0);
> > + return r;
> > +}
> > +
> > /* do some init work after IP late init as dependence.
> > * and it runs in resume/gpu reset/booting up cases.
> > */
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> > index 6c76bb2..5212961 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> > @@ -566,6 +566,10 @@ amdgpu_ras_error_to_ta(enum
> amdgpu_ras_error_type
> > error) { int amdgpu_ras_init(struct amdgpu_device *adev); int
> > amdgpu_ras_fini(struct amdgpu_device *adev); int
> > amdgpu_ras_pre_fini(struct amdgpu_device *adev);
> > +int amdgpu_ras_late_init(struct amdgpu_device *adev,
> > + struct ras_common_if *ras_block,
> > + struct ras_fs_if *fs_info,
> > + struct ras_ih_if *ih_info);
> >
> > int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
> > struct ras_common_if *head, bool enable);
> > --
> > 2.7.4
>
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