Re: [PATCH 1/2] drm/amdgpu/psp: keep TMR in visible vram region for SRIOV

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Am 28.08.19 um 13:40 schrieb Tianci Yin:
From: "Tianci.Yin" <tianci.yin@xxxxxxx>

Fix compute ring test failure in sriov scenario.

Change-Id: I141d3d094e2cba9bcf2f6c96f4d8c4ef43c421c3
Signed-off-by: Tianci.Yin <tianci.yin@xxxxxxx>

Reviewed-by: Christian König <christian.koenig@xxxxxxx> for both patches.

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 15 +++++++++++----
  1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 9f7cc5b..43fa8b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -239,6 +239,7 @@ static int psp_tmr_init(struct psp_context *psp)
  {
  	int ret;
  	int tmr_size;
+	void *tmr_buf;
/*
  	 * According to HW engineer, they prefer the TMR address be "naturally
@@ -261,9 +262,14 @@ static int psp_tmr_init(struct psp_context *psp)
  		}
  	}
- ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE,
-				      AMDGPU_GEM_DOMAIN_VRAM,
-				      &psp->tmr_bo, &psp->tmr_mc_addr, NULL);
+	if (!amdgpu_sriov_vf(psp->adev))
+		ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE,
+					      AMDGPU_GEM_DOMAIN_VRAM,
+					      &psp->tmr_bo, &psp->tmr_mc_addr, NULL);
+	else
+		ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE,
+					      AMDGPU_GEM_DOMAIN_VRAM,
+					      &psp->tmr_bo, &psp->tmr_mc_addr, &tmr_buf);
return ret;
  }
@@ -1206,6 +1212,7 @@ static int psp_hw_fini(void *handle)
  {
  	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  	struct psp_context *psp = &adev->psp;
+	void *tmr_buf;
if (adev->gmc.xgmi.num_physical_nodes > 1 &&
  	    psp->xgmi_context.initialized == 1)
@@ -1216,7 +1223,7 @@ static int psp_hw_fini(void *handle)
psp_ring_destroy(psp, PSP_RING_TYPE__KM); - amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, NULL);
+	amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &tmr_buf);
  	amdgpu_bo_free_kernel(&psp->fw_pri_bo,
  			      &psp->fw_pri_mc_addr, &psp->fw_pri_buf);
  	amdgpu_bo_free_kernel(&psp->fence_buf_bo,

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