On 2019-08-26 2:12 p.m., Koenig, Christian wrote: > > We should probably just revert back the to doing most of the mapping in > amdgpu_vm_bo_split_mapping(). > > Here we already have a whole bunch of ASIC specific handling anyway: > >> if (!(mapping->flags & AMDGPU_PTE_READABLE)) >> flags &= ~AMDGPU_PTE_READABLE; >> if (!(mapping->flags & AMDGPU_PTE_WRITEABLE)) >> flags &= ~AMDGPU_PTE_WRITEABLE; >> >> flags &= ~AMDGPU_PTE_EXECUTABLE; >> flags |= mapping->flags & AMDGPU_PTE_EXECUTABLE; >> >> if (adev->asic_type == CHIP_NAVI10) { >> flags &= ~AMDGPU_PTE_MTYPE_NV10_MASK; >> flags |= (mapping->flags & AMDGPU_PTE_MTYPE_NV10_MASK); >> } else { >> flags &= ~AMDGPU_PTE_MTYPE_VG10_MASK; >> flags |= (mapping->flags & AMDGPU_PTE_MTYPE_VG10_MASK); >> } >> >> if ((mapping->flags & AMDGPU_PTE_PRT) && >> (adev->asic_type >= CHIP_VEGA10)) { >> flags |= AMDGPU_PTE_PRT; >> if (adev->asic_type >= CHIP_NAVI10) { >> flags |= AMDGPU_PTE_SNOOPED; >> flags |= AMDGPU_PTE_LOG; >> flags |= AMDGPU_PTE_SYSTEM; >> } >> flags &= ~AMDGPU_PTE_VALID; >> } > And now that you mentioned it, the code you proposed wouldn't have > worked anyway because the AMDGPU_PTE_SNOOPED would have been filtered > out here :) OK, and that does look like the right place to set the PTE_SNOOPED bit for XGMI mappings on Arcturus. I'll send out an updated patch series that no longer needs the AMDGPU_VM_PAGE_INVALIDATE_PROBE bit in the UAPI. Thanks for the pointer, Felix > > Regards, > Christian. > _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx