From: Aaron Liu <aaron.liu@xxxxxxx> In renoir's ih model, there's a change in mmIH_CHICKEN register, that limits IH to use physical address directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu <aaron.liu@xxxxxxx> Reviewed-by: Huang Rui <ray.huang@xxxxxxx> Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index a55525abb73c..f19268aea38d 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c @@ -245,7 +245,7 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev) WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); } - if (adev->asic_type == CHIP_ARCTURUS && + if ((adev->asic_type == CHIP_ARCTURUS || adev->asic_type == CHIP_RENOIR) && adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { if (adev->irq.ih.use_bus_addr) { ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN); -- 2.20.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx