Reviewed-by: Kenneth Feng <kenneth.feng@xxxxxxx> -----Original Message----- From: amd-gfx [mailto:amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of Le Ma Sent: Thursday, August 08, 2019 6:22 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Ma, Le <Le.Ma@xxxxxxx> Subject: [PATCH 2/9] drm/amdgpu: enable gfx clock gating for Arcturus [CAUTION: External Email] Init gfx MGCG/LS, CGCG/LS, CP_LS flag. Change-Id: I88db76d1b8f2b2cecce10846a4d22eec638eea8a Signed-off-by: Le Ma <le.ma@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/soc15.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 15f6356..00758be 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -1013,7 +1013,11 @@ static int soc15_common_early_init(void *handle) break; case CHIP_ARCTURUS: adev->asic_funcs = &vega20_asic_funcs; - adev->cg_flags = 0; + adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | + AMD_CG_SUPPORT_GFX_MGLS | + AMD_CG_SUPPORT_GFX_CGCG | + AMD_CG_SUPPORT_GFX_CGLS | + AMD_CG_SUPPORT_GFX_CP_LS; adev->pg_flags = 0; adev->external_rev_id = adev->rev_id + 0x32; break; -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
