On Tue, Aug 6, 2019 at 2:19 PM Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@xxxxxxx> wrote: > > The SOC15_REG_OFFSET() macro wasn't used, making the soft recovery fail. > > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index bcd0301eee1e..ff87f6ea5cd6 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -5375,7 +5375,7 @@ static void gfx_v9_0_ring_soft_recovery(struct amdgpu_ring *ring, unsigned vmid) > value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); > value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); > value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); > - WREG32(mmSQ_CMD, value); > + WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CMD), value); Please use WREG32_SOC15(). With that fixed: Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> > } > > static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, > -- > 2.23.0.rc1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
