Hi Will and Andrey, On 24/07/2019 15:20, Will Deacon wrote: > On Wed, Jul 24, 2019 at 04:16:49PM +0200, Andrey Konovalov wrote: >> On Wed, Jul 24, 2019 at 4:02 PM Will Deacon <will@xxxxxxxxxx> wrote: >>> On Tue, Jul 23, 2019 at 08:03:29PM +0200, Andrey Konovalov wrote: >>>> On Tue, Jul 23, 2019 at 7:59 PM Andrey Konovalov <andreyknvl@xxxxxxxxxx> wrote: >>>>> >>>>> === Overview >>>>> >>>>> arm64 has a feature called Top Byte Ignore, which allows to embed pointer >>>>> tags into the top byte of each pointer. Userspace programs (such as >>>>> HWASan, a memory debugging tool [1]) might use this feature and pass >>>>> tagged user pointers to the kernel through syscalls or other interfaces. >>>>> >>>>> Right now the kernel is already able to handle user faults with tagged >>>>> pointers, due to these patches: >>>>> >>>>> 1. 81cddd65 ("arm64: traps: fix userspace cache maintenance emulation on a >>>>> tagged pointer") >>>>> 2. 7dcd9dd8 ("arm64: hw_breakpoint: fix watchpoint matching for tagged >>>>> pointers") >>>>> 3. 276e9327 ("arm64: entry: improve data abort handling of tagged >>>>> pointers") >>>>> >>>>> This patchset extends tagged pointer support to syscall arguments. >>> >>> [...] >>> >>>> Do you think this is ready to be merged? >>>> >>>> Should this go through the mm or the arm tree? >>> >>> I would certainly prefer to take at least the arm64 bits via the arm64 tree >>> (i.e. patches 1, 2 and 15). We also need a Documentation patch describing >>> the new ABI. >> >> Sounds good! Should I post those patches together with the >> Documentation patches from Vincenzo as a separate patchset? > > Yes, please (although as you say below, we need a new version of those > patches from Vincenzo to address the feedback on v5). The other thing I > should say is that I'd be happy to queue the other patches in the series > too, but some of them are missing acks from the relevant maintainers (e.g. > the mm/ and fs/ changes). > I am actively working on the document and will share v6 with the requested changes in the next few days. > Will > -- Regards, Vincenzo _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx