Please do not change the output temperature granularity. Although it seems a little weird. It's required by hwmon interfaces design and has to be in millidegrees Celsius (@Deucher, Alexander, right?). * hwmon interfaces for GPU temperature: * * - temp[1-3]_input: the on die GPU temperature in millidegrees Celsius * - temp2_input and temp3_input are supported on SOC15 dGPUs only * * - temp[1-3]_label: temperature channel label * - temp2_label and temp3_label are supported on SOC15 dGPUs only * * - temp[1-3]_crit: temperature critical max value in millidegrees Celsius * - temp2_crit and temp3_crit are supported on SOC15 dGPUs only * * - temp[1-3]_crit_hyst: temperature hysteresis for critical limit in millidegrees Celsius * - temp2_crit_hyst and temp3_crit_hyst are supported on SOC15 dGPUs only * * - temp[1-3]_emergency: temperature emergency max value(asic shutdown) in millidegrees Celsius * - these are supported on SOC15 dGPUs only Regards, Evan > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of > Wang, Kevin(Yang) > Sent: Tuesday, July 23, 2019 5:32 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Huang, Ray <Ray.Huang@xxxxxxx>; Feng, Kenneth > <Kenneth.Feng@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> > Subject: [PATCH] drm/amd/powerplay: add callback function of > get_thermal_temperature_range > > 1. the thermal temperature is asic related data, move the code logic to > xxx_ppt.c. > 2. replace data structure PP_TemperatureRange with > smu_temperature_range. > 3. change temperature uint from temp*1000 to temp (temperature uint). > > Signed-off-by: Kevin Wang <kevin1.wang@xxxxxxx> > Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx> > Acked-by: Huang Rui <ray.huang@xxxxxxx> > --- > .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 - > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 17 ++++++++++ > drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 18 ++++++---- > drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 34 ++++++------------- > 4 files changed, 40 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > index 34093ddca105..7105f8041088 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > @@ -439,7 +439,6 @@ struct smu_table_context > struct smu_table *tables; > uint32_t table_count; > struct smu_table memory_pool; > - uint16_t software_shutdown_temp; > uint8_t thermal_controller_type; > uint16_t TDPODLimit; > > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index 46e2913e4af4..a4c4d4997189 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -1638,6 +1638,22 @@ static int navi10_set_performance_level(struct > smu_context *smu, enum amd_dpm_fo > return ret; > } > > +static int navi10_get_thermal_temperature_range(struct smu_context > *smu, > + struct > smu_temperature_range *range) { > + struct smu_table_context *table_context = &smu->smu_table; > + struct smu_11_0_powerplay_table *powerplay_table = > +table_context->power_play_table; > + > + if (!range || !powerplay_table) > + return -EINVAL; > + > + /* The unit is temperature */ > + range->min = 0; > + range->max = powerplay_table->software_shutdown_temp; > + > + return 0; > +} > + > static const struct pptable_funcs navi10_ppt_funcs = { > .tables_init = navi10_tables_init, > .alloc_dpm_context = navi10_allocate_dpm_context, @@ -1674,6 > +1690,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { > .get_ppfeature_status = navi10_get_ppfeature_status, > .set_ppfeature_status = navi10_set_ppfeature_status, > .set_performance_level = navi10_set_performance_level, > + .get_thermal_temperature_range = > navi10_get_thermal_temperature_range, > }; > > void navi10_set_ppt_funcs(struct smu_context *smu) diff --git > a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > index 76bc157525d0..4ad9e0c5a637 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > @@ -1147,10 +1147,8 @@ static int smu_v11_0_set_thermal_range(struct > smu_context *smu, > struct smu_temperature_range *range) { > struct amdgpu_device *adev = smu->adev; > - int low = SMU_THERMAL_MINIMUM_ALERT_TEMP * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - int high = SMU_THERMAL_MAXIMUM_ALERT_TEMP * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > + int low = SMU_THERMAL_MINIMUM_ALERT_TEMP; > + int high = SMU_THERMAL_MAXIMUM_ALERT_TEMP; > uint32_t val; > > if (!range) > @@ -1161,6 +1159,9 @@ static int smu_v11_0_set_thermal_range(struct > smu_context *smu, > if (high > range->max) > high = range->max; > > + low = max(SMU_THERMAL_MINIMUM_ALERT_TEMP, range->min); > + high = min(SMU_THERMAL_MAXIMUM_ALERT_TEMP, range->max); > + > if (low > high) > return -EINVAL; > > @@ -1169,8 +1170,8 @@ static int smu_v11_0_set_thermal_range(struct > smu_context *smu, > val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > THERM_IH_HW_ENA, 1); > val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > THERM_INTH_MASK, 0); > val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > THERM_INTL_MASK, 0); > - val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > DIG_THERM_INTH, (high / > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES)); > - val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > DIG_THERM_INTL, (low / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES)); > + val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > DIG_THERM_INTH, (high & 0xff)); > + val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, > DIG_THERM_INTL, (low & > +0xff)); > val = val & > (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK); > > WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); @@ - > 1209,7 +1210,10 @@ static int smu_v11_0_start_thermal_control(struct > smu_context *smu) > > if (!smu->pm_enabled) > return ret; > + > ret = smu_get_thermal_temperature_range(smu, &range); > + if (ret) > + return ret; > > if (smu->smu_table.thermal_controller_type) { > ret = smu_v11_0_set_thermal_range(smu, &range); @@ - > 1234,6 +1238,8 @@ static int smu_v11_0_start_thermal_control(struct > smu_context *smu) > adev->pm.dpm.thermal.min_mem_temp = range.mem_min; > adev->pm.dpm.thermal.max_mem_crit_temp = > range.mem_crit_max; > adev->pm.dpm.thermal.max_mem_emergency_temp = > range.mem_emergency_max; > + adev->pm.dpm.thermal.min_temp = range.min * > SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > + adev->pm.dpm.thermal.max_temp = range.max * > +SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > > return ret; > } > diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > index bcd0efaf7bbd..deb102ffedc2 100644 > --- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c > @@ -463,7 +463,6 @@ static int vega20_store_powerplay_table(struct > smu_context *smu) > memcpy(table_context->driver_pptable, &powerplay_table- > >smcPPTable, > sizeof(PPTable_t)); > > - table_context->software_shutdown_temp = powerplay_table- > >usSoftwareShutdownTemp; > table_context->thermal_controller_type = powerplay_table- > >ucThermalControllerType; > table_context->TDPODLimit = le32_to_cpu(powerplay_table- > >OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPER > CENTAGE]); > > @@ -3235,35 +3234,24 @@ static int vega20_set_watermarks_table(struct > smu_context *smu, > return 0; > } > > -static const struct smu_temperature_range vega20_thermal_policy[] = -{ > - {-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000}, > - { 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000, > 120000}, > -}; > - > static int vega20_get_thermal_temperature_range(struct smu_context > *smu, > struct > smu_temperature_range*range) { > - > + struct smu_table_context *table_context = &smu->smu_table; > + ATOM_Vega20_POWERPLAYTABLE *powerplay_table = > +table_context->power_play_table; > PPTable_t *pptable = smu->smu_table.driver_pptable; > > - if (!range) > + if (!range || !powerplay_table) > return -EINVAL; > > - memcpy(range, &vega20_thermal_policy[0], sizeof(struct > smu_temperature_range)); > - > - range->max = pptable->TedgeLimit * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - range->edge_emergency_max = (pptable->TedgeLimit + > CTF_OFFSET_EDGE) * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - range->hotspot_crit_max = pptable->ThotspotLimit * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - range->hotspot_emergency_max = (pptable->ThotspotLimit + > CTF_OFFSET_HOTSPOT) * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - range->mem_crit_max = pptable->ThbmLimit * > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > - range->mem_emergency_max = (pptable->ThbmLimit + > CTF_OFFSET_HBM)* > - SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; > + /* The unit is temperature */ > + range->min = 0; > + range->max = powerplay_table->usSoftwareShutdownTemp; > + range->edge_emergency_max = (pptable->TedgeLimit + > CTF_OFFSET_EDGE); > + range->hotspot_crit_max = pptable->ThotspotLimit; > + range->hotspot_emergency_max = (pptable->ThotspotLimit + > CTF_OFFSET_HOTSPOT); > + range->mem_crit_max = pptable->ThbmLimit; > + range->mem_emergency_max = (pptable->ThbmLimit + > CTF_OFFSET_HBM); > > > return 0; > -- > 2.22.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx