> -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of > Christian K?nig > Sent: Friday, July 19, 2019 3:33 PM > To: Liu, Leo <Leo.Liu@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH] drm/amdgpu: use VCN firmware offset for cache > window > > Am 18.07.19 um 17:49 schrieb Liu, Leo: > > Since we are using the signed FW now, and also using PSP firmware > > loading, but it's still potential to break driver when loading FW > > directly instead of PSP, so we should add offset. > > > > Signed-off-by: Leo Liu <leo.liu@xxxxxxx> > > Acked-by: Christian König <christian.koenig@xxxxxxx> Thanks Leo! Patch is Reviewed-by: Huang Rui <ray.huang@xxxxxxx> > > > --- > > drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 --- > > 1 file changed, 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > > b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > > index 3cb62e448a37..88e3dedcf926 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > > +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > > @@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct > amdgpu_device *adev) > > WREG32_SOC15(UVD, 0, > mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, > > upper_32_bits(adev->vcn.inst->gpu_addr)); > > offset = size; > > - /* No signed header for now from firmware > > WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, > > AMDGPU_UVD_FIRMWARE_OFFSET >> 3); > > - */ > > - WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, > 0); > > } > > > > WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
