The specification says to treat a PTE with the F bit set "like a PDE" which means that all but the lower 6 bits are part of the page base address. Indeed, in the wild a comment came back indicating that we were stripping off bits needed to properly fetch the next PTE. Signed-off-by: Tom St Denis <tom.stdenis@xxxxxxx> --- src/lib/read_vram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib/read_vram.c b/src/lib/read_vram.c index cba8f6b..209ca84 100644 --- a/src/lib/read_vram.c +++ b/src/lib/read_vram.c @@ -654,7 +654,7 @@ pte_further: // decode PTE values pde_is_pte: - pte_fields.page_base_addr = pte_entry & 0xFFFFFFFFF000ULL; + pte_fields.page_base_addr = pte_entry & 0xFFFFFFFFFFC0ULL; // all but bottom 6 bits are PBA pte_fields.fragment = (pte_entry >> 7) & 0x1F; pte_fields.system = (pte_entry >> 1) & 1; pte_fields.valid = pte_entry & 1; -- 2.21.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
