Usually for API *is_enabled, either 0 or 1 should be returned. Or you can give the API a new naming. With that addressed, the patch is reviewed-by: Evan Quan <evan.quan@xxxxxxx> Regards, Evan > -----Original Message----- > From: Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> > Sent: Friday, July 12, 2019 6:00 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Feng, Kenneth <Kenneth.Feng@xxxxxxx>; Quan, Evan > <Evan.Quan@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> > Subject: [PATCH v2] drm/amd/powerplay: add helper of > smu_clk_dpm_is_enabled for smu > > v2: change function name to smu_clk_dpm_is_enabled. > add this helper function to check dpm clk feature is enabled. > > Change-Id: I7f9949033c318fec618a9701df4a082d54a626c8 > Signed-off-by: Kevin Wang <kevin1.wang@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 69 ++++++++++++----- > -- > .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 + > 2 files changed, 47 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > index 787a293fde97..c16195e19078 100644 > --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c > @@ -69,6 +69,10 @@ int smu_set_soft_freq_range(struct smu_context > *smu, enum smu_clk_type clk_type, > if (min <= 0 && max <= 0) > return -EINVAL; > > + ret = smu_clk_dpm_is_enabled(smu, clk_type); > + if (ret) > + return ret; > + > clk_id = smu_clk_get_index(smu, clk_type); > if (clk_id < 0) > return clk_id; > @@ -102,6 +106,10 @@ int smu_set_hard_freq_range(struct smu_context > *smu, enum smu_clk_type clk_type, > if (min <= 0 && max <= 0) > return -EINVAL; > > + ret = smu_clk_dpm_is_enabled(smu, clk_type); > + if (ret) > + return ret; > + > clk_id = smu_clk_get_index(smu, clk_type); > if (clk_id < 0) > return clk_id; > @@ -135,29 +143,9 @@ int smu_get_dpm_freq_range(struct smu_context > *smu, enum smu_clk_type clk_type, > if (!min && !max) > return -EINVAL; > > - switch (clk_type) { > - case SMU_MCLK: > - case SMU_UCLK: > - if (!smu_feature_is_enabled(smu, > SMU_FEATURE_DPM_UCLK_BIT)) { > - pr_warn("uclk dpm is not enabled\n"); > - return 0; > - } > - break; > - case SMU_GFXCLK: > - case SMU_SCLK: > - if (!smu_feature_is_enabled(smu, > SMU_FEATURE_DPM_GFXCLK_BIT)) { > - pr_warn("gfxclk dpm is not enabled\n"); > - return 0; > - } > - case SMU_SOCCLK: > - if (!smu_feature_is_enabled(smu, > SMU_FEATURE_DPM_SOCCLK_BIT)) { > - pr_warn("sockclk dpm is not enabled\n"); > - return 0; > - } > - break; > - default: > - break; > - } > + ret = smu_clk_dpm_is_enabled(smu, clk_type); > + if (ret) > + return ret; > > mutex_lock(&smu->mutex); > clk_id = smu_clk_get_index(smu, clk_type); @@ -200,6 +188,10 @@ > int smu_get_dpm_freq_by_index(struct smu_context *smu, enum > smu_clk_type clk_typ > if (!value) > return -EINVAL; > > + ret = smu_clk_dpm_is_enabled(smu, clk_type); > + if (ret) > + return ret; > + > clk_id = smu_clk_get_index(smu, clk_type); > if (clk_id < 0) > return clk_id; > @@ -228,6 +220,37 @@ int smu_get_dpm_level_count(struct smu_context > *smu, enum smu_clk_type clk_type, > return smu_get_dpm_freq_by_index(smu, clk_type, 0xff, value); } > > +int smu_clk_dpm_is_enabled(struct smu_context *smu, enum > smu_clk_type > +clk_type) { > + int ret = 0; > + enum smu_feature_mask feature_id = 0; > + > + switch (clk_type) { > + case SMU_MCLK: > + case SMU_UCLK: > + feature_id = SMU_FEATURE_DPM_UCLK_BIT; > + break; > + case SMU_GFXCLK: > + case SMU_SCLK: > + feature_id = SMU_FEATURE_DPM_GFXCLK_BIT; > + break; > + case SMU_SOCCLK: > + feature_id = SMU_FEATURE_DPM_SOCCLK_BIT; > + break; > + default: > + return 0; > + } > + > + ret = smu_feature_is_enabled(smu, feature_id); > + if (ret) { > + pr_warn("smu %d clk dpm feature %d is not enabled\n", > clk_type, feature_id); > + return -EACCES; > + } > + > + return ret; > +} > + > + > int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t > block_type, > bool gate) > { > diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > index c97324ef7db2..4629a64a90ed 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h > @@ -973,5 +973,6 @@ int smu_set_hard_freq_range(struct smu_context > *smu, enum smu_clk_type clk_type, enum amd_dpm_forced_level > smu_get_performance_level(struct smu_context *smu); int > smu_force_performance_level(struct smu_context *smu, enum > amd_dpm_forced_level level); int smu_set_display_count(struct > smu_context *smu, uint32_t count); > +int smu_clk_dpm_is_enabled(struct smu_context *smu, enum > smu_clk_type > +clk_type); > > #endif > -- > 2.22.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx