Reviewed-by: Evan Quan <evan.quan@xxxxxxx> > -----Original Message----- > From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of > Kenneth Feng > Sent: Thursday, July 11, 2019 3:45 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Feng, Kenneth <Kenneth.Feng@xxxxxxx> > Subject: [PATCH] drm/amd/powerplay: bug fix for sysfs > > when we set profile_peak to sysfs:power_dpm_force_performance_level, > we gets the wrong socclk level and mclk level.this patch fix this issue. > > Signed-off-by: Kenneth Feng <kenneth.feng@xxxxxxx> > --- > drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > index 5ee6508..cd32b20 100644 > --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c > @@ -1157,14 +1157,14 @@ static int navi10_get_profiling_clk_mask(struct > smu_context *smu, > ret = smu_get_dpm_level_count(smu, SMU_MCLK, > &level_count); > if (ret) > return ret; > - *sclk_mask = level_count - 1; > + *mclk_mask = level_count - 1; > } > > if(soc_mask) { > ret = smu_get_dpm_level_count(smu, SMU_SOCCLK, > &level_count); > if (ret) > return ret; > - *sclk_mask = level_count - 1; > + *soc_mask = level_count - 1; > } > } > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx