> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Prike Liang
> Sent: Friday, May 31, 2019 9:11 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Liang, Prike
> <Prike.Liang@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>
> Subject: [PATCH 2/2] drm/amd/amdgpu: add RLC firmware to support raven1
> refresh
>
> Use SMU firmware version to indentify the raven1 refresh device and
> then load homologous RLC FW.
>
> Change-Id: I7aaa67d8b59cfec03355d9199f7fb2c30ce39856
> Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
> Suggested-by: Ray Huang<Ray.Huang@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++---------
> drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 15 +++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++++++++++++-
> 4 files changed, 32 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 6fea2d1..44dd9d8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1620,6 +1620,7 @@ static int amdgpu_device_fw_loading(struct
> amdgpu_device *adev)
> {
> int r = 0;
> int i;
> + uint32_t smu_version;
>
> if (adev->asic_type >= CHIP_VEGA10) {
> for (i = 0; i < adev->num_ip_blocks; i++) {
> @@ -1645,16 +1646,9 @@ static int amdgpu_device_fw_loading(struct
> amdgpu_device *adev)
> }
> }
> }
> + r = amdgpu_pm_load_smu_firmware(adev, &smu_version);
>
> - if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs-
> >load_firmware) {
> - r = adev->powerplay.pp_funcs->load_firmware(adev-
> >powerplay.pp_handle);
> - if (r) {
> - pr_err("firmware loading failed\n");
> - return r;
> - }
> - }
> -
> - return 0;
> + return r;
> }
>
> /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index bd40d5d..dae9a58 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -2668,6 +2668,21 @@ void amdgpu_pm_print_power_states(struct
> amdgpu_device *adev)
>
> }
>
> +int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev,
> uint32_t *smu_version)
> +{
> + int r;
> +
> + if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs-
> >load_firmware) {
> + r = adev->powerplay.pp_funcs->load_firmware(adev-
> >powerplay.pp_handle);
> + if (r) {
> + pr_err("smu firmware loading failed\n");
> + return r;
> + }
> + *smu_version = adev->pm.fw_version;
> + return r ;
> + }
> +}
> +
> int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
> {
> struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> index f21a771..7ff0e76 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> @@ -34,6 +34,7 @@ void amdgpu_pm_acpi_event_handler(struct
> amdgpu_device *adev);
> int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
> void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
> void amdgpu_pm_print_power_states(struct amdgpu_device *adev);
> +int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev,
> uint32_t *smu_version);
> void amdgpu_pm_compute_clocks(struct amdgpu_device *adev);
> void amdgpu_dpm_thermal_work_handler(struct work_struct *work);
> void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index c763733..e233872 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -28,6 +28,7 @@
> #include "soc15.h"
> #include "soc15d.h"
> #include "amdgpu_atomfirmware.h"
> +#include "amdgpu_pm.h"
>
> #include "gc/gc_9_0_offset.h"
> #include "gc/gc_9_0_sh_mask.h"
> @@ -97,6 +98,7 @@ MODULE_FIRMWARE("amdgpu/raven2_me.bin");
> MODULE_FIRMWARE("amdgpu/raven2_mec.bin");
> MODULE_FIRMWARE("amdgpu/raven2_mec2.bin");
> MODULE_FIRMWARE("amdgpu/raven2_rlc.bin");
> +MODULE_FIRMWARE("amdgpu/raven_kicker_rlc.bin");
>
> static const struct soc15_reg_golden golden_settings_gc_9_0[] =
> {
> @@ -591,7 +593,8 @@ static void gfx_v9_0_check_if_need_gfxoff(struct
> amdgpu_device *adev)
> case CHIP_RAVEN:
> if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
> break;
> - if ((adev->gfx.rlc_fw_version < 531) ||
> + if ((adev->gfx.rlc_fw_version != 106 &&
> + adev->gfx.rlc_fw_version < 531) ||
> (adev->gfx.rlc_fw_version == 53815) ||
> (adev->gfx.rlc_feature_version < 1) ||
> !adev->gfx.rlc.is_rlc_v2_1)
> @@ -615,6 +618,8 @@ static int gfx_v9_0_init_microcode(struct
> amdgpu_device *adev)
> unsigned int i = 0;
> uint16_t version_major;
> uint16_t version_minor;
> + uint32_t smu_version;
> +
>
> DRM_DEBUG("\n");
>
> @@ -681,10 +686,17 @@ static int gfx_v9_0_init_microcode(struct
> amdgpu_device *adev)
> * or revision >= 0xD8 && revision <= 0xDF
> * otherwise is PCO FP5
> */
> +
> if (!strcmp(chip_name, "picasso") &&
> (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision
> <= 0xCF)) ||
> ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision
> <= 0xDF))))
> snprintf(fw_name, sizeof(fw_name),
> "amdgpu/%s_rlc_am4.bin", chip_name);
> + else if (!strcmp(chip_name, "raven")
> && !amdgpu_pm_load_smu_firmware(adev, &smu_version) &&
> + (smu_version >= 0x41e2b))
> + /**
> + *SMC is loaded by SBIOS on APU and it's able to get the SMU version
> directly.
> + */
> + snprintf(fw_name, sizeof(fw_name),
Please align the space of the comments with "snprintf".
With this fixed, the series are Reviewed-by: Huang Rui <ray.huang@xxxxxxx>
> "amdgpu/%s_kicker_rlc.bin", chip_name);
> else
> snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin",
> chip_name);
> err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
> --
> 2.7.4
>
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