Reviewed-by: Evan Quan <evan.quan@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Emily Deng
> Sent: Monday, May 27, 2019 3:43 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deng, Emily <Emily.Deng@xxxxxxx>
> Subject: [PATCH] drm/amdgpu: Need to set the baco cap before baco reset
>
> For passthrough, after rebooted the VM, driver will do a baco reset before
> doing other driver initialization during loading driver. For doing the baco
> reset, it will first check the baco reset capability. So first need to set the cap
> from the vbios information or baco reset won't be enabled.
>
> Signed-off-by: Emily Deng <Emily.Deng@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 24 ++++++++++-----
> -------
> drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 4 ++++
> .../amd/powerplay/hwmgr/vega10_processpptables.c | 24
> ++++++++++++++++++++++
> .../amd/powerplay/hwmgr/vega10_processpptables.h | 1 +
> 5 files changed, 42 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index b6ded84..7a8c220 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1541,6 +1541,17 @@ static int amdgpu_device_ip_early_init(struct
> amdgpu_device *adev)
> if (amdgpu_sriov_vf(adev))
> adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
>
> + /* Read BIOS */
> + if (!amdgpu_get_bios(adev))
> + return -EINVAL;
> +
> + r = amdgpu_atombios_init(adev);
> + if (r) {
> + dev_err(adev->dev, "amdgpu_atombios_init failed\n");
> + amdgpu_vf_error_put(adev,
> AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
> + return r;
> + }
> +
> for (i = 0; i < adev->num_ip_blocks; i++) {
> if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
> DRM_ERROR("disabled ip block: %d <%s>\n", @@ -
> 2591,19 +2602,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> goto fence_driver_init;
> }
>
> - /* Read BIOS */
> - if (!amdgpu_get_bios(adev)) {
> - r = -EINVAL;
> - goto failed;
> - }
> -
> - r = amdgpu_atombios_init(adev);
> - if (r) {
> - dev_err(adev->dev, "amdgpu_atombios_init failed\n");
> - amdgpu_vf_error_put(adev,
> AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
> - goto failed;
> - }
> -
> /* detect if we are with an SRIOV vbios */
> amdgpu_device_detect_sriov_bios(adev);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 78bd4fc..d9fdd95 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -764,7 +764,8 @@ static bool soc15_need_reset_on_init(struct
> amdgpu_device *adev)
> /* Just return false for soc15 GPUs. Reset does not seem to
> * be necessary.
> */
> - return false;
> + if (!amdgpu_passthrough(adev))
> + return false;
>
> if (adev->flags & AMD_IS_APU)
> return false;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index ce6aeb5..1d9bb29 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -5311,8 +5311,12 @@ static const struct pp_hwmgr_func
> vega10_hwmgr_funcs = {
>
> int vega10_hwmgr_init(struct pp_hwmgr *hwmgr) {
> + struct amdgpu_device *adev = hwmgr->adev;
> +
> hwmgr->hwmgr_func = &vega10_hwmgr_funcs;
> hwmgr->pptable_func = &vega10_pptable_funcs;
> + if (amdgpu_passthrough(adev))
> + return vega10_baco_set_cap(hwmgr);
>
> return 0;
> }
> diff --git
> a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c
> index b6767d7..83d22cd 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c
> @@ -1371,3 +1371,27 @@ int vega10_get_powerplay_table_entry(struct
> pp_hwmgr *hwmgr,
>
> return result;
> }
> +
> +int vega10_baco_set_cap(struct pp_hwmgr *hwmgr) {
> + int result = 0;
> +
> + const ATOM_Vega10_POWERPLAYTABLE *powerplay_table;
> +
> + powerplay_table = get_powerplay_table(hwmgr);
> +
> + PP_ASSERT_WITH_CODE((powerplay_table != NULL),
> + "Missing PowerPlay Table!", return -1);
> +
> + result = check_powerplay_tables(hwmgr, powerplay_table);
> +
> + PP_ASSERT_WITH_CODE((result == 0),
> + "check_powerplay_tables failed", return result);
> +
> + set_hw_cap(
> + hwmgr,
> + 0 != (le32_to_cpu(powerplay_table->ulPlatformCaps)
> & ATOM_VEGA10_PP_PLATFORM_CAP_BACO),
> + PHM_PlatformCaps_BACO);
> + return result;
> +}
> +
> diff --git
> a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h
> index d83ed2a..da5fbec 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.h
> @@ -59,4 +59,5 @@ extern int
> vega10_get_number_of_powerplay_table_entries(struct pp_hwmgr
> *hwmgr); extern int vega10_get_powerplay_table_entry(struct pp_hwmgr
> *hwmgr, uint32_t entry_index,
> struct pp_power_state *power_state, int
> (*call_back_func)(struct pp_hwmgr *, void *,
> struct pp_power_state *, void *, uint32_t));
> +extern int vega10_baco_set_cap(struct pp_hwmgr *hwmgr);
> #endif
> --
> 2.7.4
>
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