To support new Vega10 SR-IOV L1 security, KMD need some modifications 1: Due to the new features supported in FW(PSP, RLC, etc), for register access during initialization, we have more modes: 1), request PSP to program 2), request RLC to program 3), request SR-IOV host driver to program and skip programming them in amdgpu 4), Legacy MMIO access We will try to read the firmware version to see which mode is support 2: If PSP FW support to program some registers, such as IH, we need: 1), initialize PSP before IH 2), send the specific command to PSP 3: Support VMR ring. VMR ring, compared with physical platform TMR ring, the program sequence are nearly the same, but we will use another register set, mmMP0_SMN_C2PMSG_101/102/103 to communicate with PSP 4: Skip programming some registers in guest KMD As some registers are processed by new L1 security, amdgpu on VF will fail to program them, and don’t worry, these registers will be programmed on the SR-IOV host driver side. 5: Call RLC to program some registers in instead of MMIO With new L1 policy, some registers can’t be programmed in SR-IOV VF amdgpu with MMIO. Fortunately, new RLC firmware will support to program them with specific program sequence, which are described in the patch commit message Trigger Huang (9): drm/amdgpu: init vega10 SR-IOV reg access mode drm/amdgpu: initialize PSP before IH under SR-IOV drm/amdgpu: Add new PSP cmd GFX_CMD_ID_PROG_REG drm/amdgpu: implement PSP cmd GFX_CMD_ID_PROG_REG drm/amdgpu: call psp to progrm ih cntl in SR-IOV drm/amdgpu: Support PSP VMR ring for Vega10 VF drm/amdgpu: Skip setting some regs under Vega10 VF drm/amdgpu: add basic func for RLC program reg drm/amdgpu: RLC to program regs for Vega10 SR-IOV drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 30 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 28 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 43 +++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 12 ++ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 114 ++++++++++--------- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 20 ++-- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 + drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 25 ++++- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 19 ++++ drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 8 ++ drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 131 ++++++++++++++++------ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 14 ++- drivers/gpu/drm/amd/amdgpu/soc15.c | 52 ++++++--- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 57 +++++++++- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 91 +++++++++++++-- 17 files changed, 514 insertions(+), 148 deletions(-) -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx