Re: [PATCH 5/5] drm/amd/powerplay: support hwmon temperature channel labels V2

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Series is:
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>

From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Evan Quan <evan.quan@xxxxxxx>
Sent: Tuesday, April 23, 2019 4:37 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander; Quan, Evan
Subject: [PATCH 5/5] drm/amd/powerplay: support hwmon temperature channel labels V2
 
Expose temp[1-3]_label hwmon interfaces. While temp2_label
and temp3_label are visible for SOC15 dGPUs only.

- V2: correct temp1_label as "edge"

Change-Id: I7f1e10c52ec21d272027554cdf6da97103e0be58
Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c        | 35 ++++++++++++++++++-
 .../gpu/drm/amd/include/kgd_pp_interface.h    |  7 ++++
 2 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 291c06f40dba..4fe1b58892a2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -120,6 +120,15 @@ static const struct cg_flag_name clocks[] = {
         {0, NULL},
 };
 
+static const struct hwmon_temp_label {
+       enum PP_HWMON_TEMP channel;
+       const char *label;
+} temp_label[] = {
+       {PP_TEMP_EDGE, "edge"},
+       {PP_TEMP_JUNCTION, "junction"},
+       {PP_TEMP_MEM, "mem"},
+};
+
 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
 {
         if (adev->pm.dpm_enabled) {
@@ -1511,6 +1520,19 @@ static ssize_t amdgpu_hwmon_show_mem_temp_thresh(struct device *dev,
         return snprintf(buf, PAGE_SIZE, "%d\n", temp);
 }
 
+static ssize_t amdgpu_hwmon_show_temp_label(struct device *dev,
+                                            struct device_attribute *attr,
+                                            char *buf)
+{
+       struct amdgpu_device *adev = dev_get_drvdata(dev);
+       int channel = to_sensor_dev_attr(attr)->index;
+
+       if (channel >= PP_TEMP_MAX)
+               return -EINVAL;
+
+       return snprintf(buf, PAGE_SIZE, "%s\n", temp_label[channel].label);
+}
+
 static ssize_t amdgpu_hwmon_show_temp_emergency(struct device *dev,
                                              struct device_attribute *attr,
                                              char *buf)
@@ -2109,6 +2131,9 @@ static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev,
  * - temp[1-3]_input: the on die GPU temperature in millidegrees Celsius
  *   - temp2_input and temp3_input are supported on SOC15 dGPUs only
  *
+ * - temp[1-3]_label: temperature channel label
+ *   - temp2_label and temp3_label are supported on SOC15 dGPUs only
+ *
  * - temp[1-3]_crit: temperature critical max value in millidegrees Celsius
  *   - temp2_crit and temp3_crit are supported on SOC15 dGPUs only
  *
@@ -2176,6 +2201,9 @@ static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, amdgpu_hwmon_show_temp, NULL, PP
 static SENSOR_DEVICE_ATTR(temp3_crit, S_IRUGO, amdgpu_hwmon_show_mem_temp_thresh, NULL, 0);
 static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, amdgpu_hwmon_show_mem_temp_thresh, NULL, 1);
 static SENSOR_DEVICE_ATTR(temp3_emergency, S_IRUGO, amdgpu_hwmon_show_temp_emergency, NULL, PP_TEMP_MEM);
+static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_EDGE);
+static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_JUNCTION);
+static SENSOR_DEVICE_ATTR(temp3_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_MEM);
 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1, amdgpu_hwmon_set_pwm1, 0);
 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1_enable, amdgpu_hwmon_set_pwm1_enable, 0);
 static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, amdgpu_hwmon_get_pwm1_min, NULL, 0);
@@ -2211,6 +2239,9 @@ static struct attribute *hwmon_attributes[] = {
         &sensor_dev_attr_temp1_emergency.dev_attr.attr,
         &sensor_dev_attr_temp2_emergency.dev_attr.attr,
         &sensor_dev_attr_temp3_emergency.dev_attr.attr,
+       &sensor_dev_attr_temp1_label.dev_attr.attr,
+       &sensor_dev_attr_temp2_label.dev_attr.attr,
+       &sensor_dev_attr_temp3_label.dev_attr.attr,
         &sensor_dev_attr_pwm1.dev_attr.attr,
         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
         &sensor_dev_attr_pwm1_min.dev_attr.attr,
@@ -2344,7 +2375,9 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
              attr == &sensor_dev_attr_temp2_emergency.dev_attr.attr ||
              attr == &sensor_dev_attr_temp3_emergency.dev_attr.attr ||
              attr == &sensor_dev_attr_temp2_input.dev_attr.attr ||
-            attr == &sensor_dev_attr_temp3_input.dev_attr.attr))
+            attr == &sensor_dev_attr_temp3_input.dev_attr.attr ||
+            attr == &sensor_dev_attr_temp2_label.dev_attr.attr ||
+            attr == &sensor_dev_attr_temp3_label.dev_attr.attr))
                 return 0;
 
         return effective_mode;
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index a8bf8e90ceeb..30788d510576 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -162,6 +162,13 @@ struct pp_states_info {
         uint32_t states[16];
 };
 
+enum PP_HWMON_TEMP {
+       PP_TEMP_EDGE = 0,
+       PP_TEMP_JUNCTION,
+       PP_TEMP_MEM,
+       PP_TEMP_MAX
+};
+
 #define PP_GROUP_MASK        0xF0000000
 #define PP_GROUP_SHIFT       28
 
--
2.21.0

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