On Thu, Apr 18, 2019 at 5:03 AM Evan Quan <evan.quan@xxxxxxx> wrote: > > Expose temp[1-3]_label hwmon interfaces. While temp2_label > and temp3_label are visible for SOC15 dGPUs only. > > Change-Id: I7f1e10c52ec21d272027554cdf6da97103e0be58 > Signed-off-by: Evan Quan <evan.quan@xxxxxxx> I'd suggest making this one last in the series since otherwise we'll have labels without temps for a few commits. Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 40 +++++++++++++++++++ > .../gpu/drm/amd/include/kgd_pp_interface.h | 7 ++++ > 2 files changed, 47 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c > index 552127b74f78..c17eb228417e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c > @@ -120,6 +120,15 @@ static const struct cg_flag_name clocks[] = { > {0, NULL}, > }; > > +static const struct hwmon_temp_label { > + enum PP_HWMON_TEMP channel; > + const char *label; > +} temp_label[] = { > + {PP_TEMP_JUNCTION, "junction"}, > + {PP_TEMP_EDGE, "edge"}, > + {PP_TEMP_MEM, "mem"}, > +}; > + > void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) > { > if (adev->pm.dpm_enabled) { > @@ -1457,6 +1466,20 @@ static ssize_t amdgpu_hwmon_show_temp_thresh(struct device *dev, > return snprintf(buf, PAGE_SIZE, "%d\n", temp); > } > > + > +static ssize_t amdgpu_hwmon_show_temp_label(struct device *dev, > + struct device_attribute *attr, > + char *buf) > +{ > + struct amdgpu_device *adev = dev_get_drvdata(dev); > + int channel = to_sensor_dev_attr(attr)->index; > + > + if (channel >= PP_TEMP_MAX) > + return -EINVAL; > + > + return snprintf(buf, PAGE_SIZE, "%s\n", temp_label[channel].label); > +} > + > static ssize_t amdgpu_hwmon_get_pwm1_enable(struct device *dev, > struct device_attribute *attr, > char *buf) > @@ -2026,6 +2049,9 @@ static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, > * > * hwmon interfaces for GPU temperature: > * > + * - temp[1-3]_label: temperature channel label > + * - temp2_label and temp3_label are supported on SOC15 dGPUs only > + * > * - temp1_input: the on die GPU temperature in millidegrees Celsius > * > * - temp1_crit: temperature critical max value in millidegrees Celsius > @@ -2081,6 +2107,9 @@ static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, > static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, amdgpu_hwmon_show_temp, NULL, 0); > static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 0); > static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 1); > +static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_JUNCTION); > +static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_EDGE); > +static SENSOR_DEVICE_ATTR(temp3_label, S_IRUGO, amdgpu_hwmon_show_temp_label, NULL, PP_TEMP_MEM); > static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1, amdgpu_hwmon_set_pwm1, 0); > static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1_enable, amdgpu_hwmon_set_pwm1_enable, 0); > static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, amdgpu_hwmon_get_pwm1_min, NULL, 0); > @@ -2107,6 +2136,9 @@ static struct attribute *hwmon_attributes[] = { > &sensor_dev_attr_temp1_input.dev_attr.attr, > &sensor_dev_attr_temp1_crit.dev_attr.attr, > &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, > + &sensor_dev_attr_temp1_label.dev_attr.attr, > + &sensor_dev_attr_temp2_label.dev_attr.attr, > + &sensor_dev_attr_temp3_label.dev_attr.attr, > &sensor_dev_attr_pwm1.dev_attr.attr, > &sensor_dev_attr_pwm1_enable.dev_attr.attr, > &sensor_dev_attr_pwm1_min.dev_attr.attr, > @@ -2229,6 +2261,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, > attr == &sensor_dev_attr_freq2_label.dev_attr.attr)) > return 0; > > + /* only SOC15 dGPUs support edge and mem temperatures */ > + if (((adev->flags & AMD_IS_APU) || > + adev->asic_type < CHIP_VEGA10) && > + (attr == &sensor_dev_attr_temp2_label.dev_attr.attr || > + attr == &sensor_dev_attr_temp3_label.dev_attr.attr)) > + return 0; > + > + > return effective_mode; > } > > diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h > index 2b579ba9b685..17324c0d503e 100644 > --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h > +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h > @@ -159,6 +159,13 @@ struct pp_states_info { > uint32_t states[16]; > }; > > +enum PP_HWMON_TEMP { > + PP_TEMP_JUNCTION = 0, > + PP_TEMP_EDGE, > + PP_TEMP_MEM, > + PP_TEMP_MAX > +}; > + > #define PP_GROUP_MASK 0xF0000000 > #define PP_GROUP_SHIFT 28 > > -- > 2.21.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx