Reviewed-by: Feifei Xu <Feifei.Xu@xxxxxxx>
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Quan, Evan
Sent: Friday, March 22, 2019 4:32 PM
To: Quan, Evan <Evan.Quan@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: RE: [PATCH 1/3] drm/amdgpu: error out on mode1 reset failure
Ping..
> -----Original Message-----
> From: Evan Quan <evan.quan@xxxxxxx>
> Sent: 2019年3月15日 14:02
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Quan, Evan <Evan.Quan@xxxxxxx>
> Subject: [PATCH 1/3] drm/amdgpu: error out on mode1 reset failure
>
> The error return value should be correctly reflected.
>
> Change-Id: I93bf6fa77193d4e3f102a4e223aa8cb18cb525cc
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/soc15.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 0c5ce4bd6feb..9d33a5d73072 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -393,6 +393,7 @@ void soc15_program_register_sequence(struct
> amdgpu_device *adev, static int soc15_asic_mode1_reset(struct
> amdgpu_device *adev) {
> u32 i;
> + int ret = 0;
>
> amdgpu_atombios_scratch_regs_engine_hung(adev, true);
>
> @@ -403,7 +404,9 @@ static int soc15_asic_mode1_reset(struct
> amdgpu_device *adev)
>
> pci_save_state(adev->pdev);
>
> - psp_gpu_reset(adev);
> + ret = psp_gpu_reset(adev);
> + if (ret)
> + dev_err(adev->dev, "GPU mode1 reset failed\n");
>
> pci_restore_state(adev->pdev);
>
> @@ -418,7 +421,7 @@ static int soc15_asic_mode1_reset(struct
> amdgpu_device *adev)
>
> amdgpu_atombios_scratch_regs_engine_hung(adev, false);
>
> - return 0;
> + return ret;
> }
>
> static int soc15_asic_get_baco_capability(struct amdgpu_device *adev,
> bool
> *cap)
> --
> 2.21.0
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