On Mon, Mar 18, 2019 at 6:14 AM Christian König <ckoenig.leichtzumerken@xxxxxxxxx> wrote: > > We only need to clear the bit in a 32bit integer. > > This fixes a crah on ARM64 and PPC64LE caused by > "drm/amdgpu: update the vm invalidation engine layout V2" > > Signed-off-by: Christian König <christian.koenig@xxxxxxx> > Cc: stable@xxxxxxxxxxxxxxx Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index 84a4b31246ce..e00fef6962da 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -647,7 +647,7 @@ static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev) > } > > ring->vm_inv_eng = inv_eng - 1; > - change_bit(inv_eng - 1, (unsigned long *)(&vm_inv_engs[vmhub])); > + vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng); > > dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n", > ring->name, ring->vm_inv_eng, ring->funcs->vmhub); > -- > 2.17.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
