Wasn't there a long discussion about this timing some months ago... ?
Regards
//Ernst
Den tors 28 feb. 2019 kl 11:47 skrev Xu, Feifei <Feifei.Xu@xxxxxxx>:
>
> Reviewed-by: Feifei Xu <Feifei.Xu@xxxxxxx>
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Evan Quan
> Sent: Thursday, February 28, 2019 6:32 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Quan, Evan <Evan.Quan@xxxxxxx>
> Subject: [PATCH 1/2] drm/amd/powerplay: correct power reading on fiji
>
> Set sampling period as 500ms to provide a smooth power reading output. Also, correct the register for power reading.
>
> Change-Id: I13935f3e7fcd026d34aa6a68cf7f683dc6785ab7
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 48187acac59e..83d3d935f3ac 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -3491,14 +3491,14 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query)
>
> smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogStart);
> cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> - ixSMU_PM_STATUS_94, 0);
> + ixSMU_PM_STATUS_95, 0);
>
> for (i = 0; i < 10; i++) {
> - mdelay(1);
> + mdelay(500);
> smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PmStatusLogSample);
> tmp = cgs_read_ind_register(hwmgr->device,
> CGS_IND_REG__SMC,
> - ixSMU_PM_STATUS_94);
> + ixSMU_PM_STATUS_95);
> if (tmp != 0)
> break;
> }
> --
> 2.21.0
>
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