This is needed for the new SMC firmwares only. Change-Id: I5934e5161ec53c1dd73cb1542ef6b738ad2e620c Signed-off-by: Evan Quan <evan.quan@xxxxxxx> --- .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 16 ++++++++++++++++ drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h | 3 ++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c index 9aa7bec1b5fe..d35f60ab3404 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c @@ -828,6 +828,17 @@ static int vega20_override_pcie_parameters(struct pp_hwmgr *hwmgr) return 0; } +static int vega20_override_duty_cycle(struct pp_hwmgr *hwmgr) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); + int ret = 0; + + if (adev->pm.fw_version >= 0x00282700) + ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_OverrideDutyCycle); + + return ret; +} + static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) { struct vega20_hwmgr *data = @@ -1644,6 +1655,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr) "[EnableDPMTasks] Failed to enable all smu features!", return result); + result = vega20_override_duty_cycle(hwmgr); + PP_ASSERT_WITH_CODE(!result, + "[EnableDPMTasks] Failed to override duty cycle!", + return result); + result = vega20_override_pcie_parameters(hwmgr); PP_ASSERT_WITH_CODE(!result, "[EnableDPMTasks] Failed to override pcie parameters!", diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h index 4f63a736ea0e..4a1e01f04cf5 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h +++ b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h @@ -119,7 +119,8 @@ #define PPSMC_MSG_PrepareMp1ForShutdown 0x5A #define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x5D #define PPSMC_MSG_GetAVFSVoltageByDpm 0x5F -#define PPSMC_Message_Count 0x60 +#define PPSMC_MSG_OverrideDutyCycle 0x64 +#define PPSMC_Message_Count 0x65 typedef uint32_t PPSMC_Result; typedef uint32_t PPSMC_Msg; -- 2.21.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx