Re: [Intel-gfx] [PATCH 1/3] drm/i915: Move dsc rate params compute into drm

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Hi David,

url:    https://github.com/0day-ci/linux/commits/David-Francis/Make-DRM-DSC-helpers-more-generally-usable/20190214-052541

smatch warnings:
drivers/gpu/drm/drm_dsc.c:306 drm_dsc_compute_rc_parameters() warn: impossible condition '(vdsc_cfg->nfl_bpg_offset > 65535) => (0-u16max > u16max)'
drivers/gpu/drm/drm_dsc.c:340 drm_dsc_compute_rc_parameters() warn: impossible condition '(vdsc_cfg->scale_increment_interval > 65535) => (0-u16max > u16max)'

# https://github.com/0day-ci/linux/commit/932e204c9cbe2995451a800351bcd781fa7cb1c5
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 932e204c9cbe2995451a800351bcd781fa7cb1c5
vim +306 drivers/gpu/drm/drm_dsc.c

932e204c David Francis 2019-02-13  230  
932e204c David Francis 2019-02-13  231  /**
932e204c David Francis 2019-02-13  232   * drm_dsc_compute_rc_parameters() - Write rate control
932e204c David Francis 2019-02-13  233   * parameters to the dsc configuration. Some configuration
932e204c David Francis 2019-02-13  234   * fields must be present beforehand.
932e204c David Francis 2019-02-13  235   *
932e204c David Francis 2019-02-13  236   * @dsc_cfg:
932e204c David Francis 2019-02-13  237   * DSC Configuration data partially filled by driver
932e204c David Francis 2019-02-13  238   */
932e204c David Francis 2019-02-13  239  int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg)
932e204c David Francis 2019-02-13  240  {
932e204c David Francis 2019-02-13  241  	unsigned long groups_per_line = 0;
932e204c David Francis 2019-02-13  242  	unsigned long groups_total = 0;
932e204c David Francis 2019-02-13  243  	unsigned long num_extra_mux_bits = 0;
932e204c David Francis 2019-02-13  244  	unsigned long slice_bits = 0;
932e204c David Francis 2019-02-13  245  	unsigned long hrd_delay = 0;
932e204c David Francis 2019-02-13  246  	unsigned long final_scale = 0;
932e204c David Francis 2019-02-13  247  	unsigned long rbs_min = 0;
932e204c David Francis 2019-02-13  248  
932e204c David Francis 2019-02-13  249  	/* Number of groups used to code each line of a slice */
932e204c David Francis 2019-02-13  250  	groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width,
932e204c David Francis 2019-02-13  251  				       DSC_RC_PIXELS_PER_GROUP);
932e204c David Francis 2019-02-13  252  
932e204c David Francis 2019-02-13  253  	/* chunksize in Bytes */
932e204c David Francis 2019-02-13  254  	vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width *
932e204c David Francis 2019-02-13  255  						  vdsc_cfg->bits_per_pixel,
932e204c David Francis 2019-02-13  256  						  (8 * 16));
932e204c David Francis 2019-02-13  257  
932e204c David Francis 2019-02-13  258  	if (vdsc_cfg->convert_rgb)
932e204c David Francis 2019-02-13  259  		num_extra_mux_bits = 3 * (vdsc_cfg->mux_word_size +
932e204c David Francis 2019-02-13  260  					  (4 * vdsc_cfg->bits_per_component + 4)
932e204c David Francis 2019-02-13  261  					  - 2);
932e204c David Francis 2019-02-13  262  	else
932e204c David Francis 2019-02-13  263  		num_extra_mux_bits = 3 * vdsc_cfg->mux_word_size +
932e204c David Francis 2019-02-13  264  			(4 * vdsc_cfg->bits_per_component + 4) +
932e204c David Francis 2019-02-13  265  			2 * (4 * vdsc_cfg->bits_per_component) - 2;
932e204c David Francis 2019-02-13  266  	/* Number of bits in one Slice */
932e204c David Francis 2019-02-13  267  	slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height;
932e204c David Francis 2019-02-13  268  
932e204c David Francis 2019-02-13  269  	while ((num_extra_mux_bits > 0) &&
932e204c David Francis 2019-02-13  270  	       ((slice_bits - num_extra_mux_bits) % vdsc_cfg->mux_word_size))
932e204c David Francis 2019-02-13  271  		num_extra_mux_bits--;
932e204c David Francis 2019-02-13  272  
932e204c David Francis 2019-02-13  273  	if (groups_per_line < vdsc_cfg->initial_scale_value - 8)
932e204c David Francis 2019-02-13  274  		vdsc_cfg->initial_scale_value = groups_per_line + 8;
932e204c David Francis 2019-02-13  275  
932e204c David Francis 2019-02-13  276  	/* scale_decrement_interval calculation according to DSC spec 1.11 */
932e204c David Francis 2019-02-13  277  	if (vdsc_cfg->initial_scale_value > 8)
932e204c David Francis 2019-02-13  278  		vdsc_cfg->scale_decrement_interval = groups_per_line /
932e204c David Francis 2019-02-13  279  			(vdsc_cfg->initial_scale_value - 8);
932e204c David Francis 2019-02-13  280  	else
932e204c David Francis 2019-02-13  281  		vdsc_cfg->scale_decrement_interval = DSC_SCALE_DECREMENT_INTERVAL_MAX;
932e204c David Francis 2019-02-13  282  
932e204c David Francis 2019-02-13  283  	vdsc_cfg->final_offset = vdsc_cfg->rc_model_size -
932e204c David Francis 2019-02-13  284  		(vdsc_cfg->initial_xmit_delay *
932e204c David Francis 2019-02-13  285  		 vdsc_cfg->bits_per_pixel + 8) / 16 + num_extra_mux_bits;
932e204c David Francis 2019-02-13  286  
932e204c David Francis 2019-02-13  287  	if (vdsc_cfg->final_offset >= vdsc_cfg->rc_model_size) {
932e204c David Francis 2019-02-13  288  		DRM_DEBUG_KMS("FinalOfs < RcModelSze for this InitialXmitDelay\n");
932e204c David Francis 2019-02-13  289  		return -ERANGE;
932e204c David Francis 2019-02-13  290  	}
932e204c David Francis 2019-02-13  291  
932e204c David Francis 2019-02-13  292  	final_scale = (vdsc_cfg->rc_model_size * 8) /
932e204c David Francis 2019-02-13  293  		(vdsc_cfg->rc_model_size - vdsc_cfg->final_offset);
932e204c David Francis 2019-02-13  294  	if (vdsc_cfg->slice_height > 1)
932e204c David Francis 2019-02-13  295  		/*
932e204c David Francis 2019-02-13  296  		 * NflBpgOffset is 16 bit value with 11 fractional bits
932e204c David Francis 2019-02-13  297  		 * hence we multiply by 2^11 for preserving the
932e204c David Francis 2019-02-13  298  		 * fractional part
932e204c David Francis 2019-02-13  299  		 */
932e204c David Francis 2019-02-13  300  		vdsc_cfg->nfl_bpg_offset = DIV_ROUND_UP((vdsc_cfg->first_line_bpg_offset << 11),
932e204c David Francis 2019-02-13  301  							(vdsc_cfg->slice_height - 1));
932e204c David Francis 2019-02-13  302  	else
932e204c David Francis 2019-02-13  303  		vdsc_cfg->nfl_bpg_offset = 0;
932e204c David Francis 2019-02-13  304  
932e204c David Francis 2019-02-13  305  	/* 2^16 - 1 */
932e204c David Francis 2019-02-13 @306  	if (vdsc_cfg->nfl_bpg_offset > 65535) {
932e204c David Francis 2019-02-13  307  		DRM_DEBUG_KMS("NflBpgOffset is too large for this slice height\n");
932e204c David Francis 2019-02-13  308  		return -ERANGE;
932e204c David Francis 2019-02-13  309  	}
932e204c David Francis 2019-02-13  310  
932e204c David Francis 2019-02-13  311  	/* Number of groups used to code the entire slice */
932e204c David Francis 2019-02-13  312  	groups_total = groups_per_line * vdsc_cfg->slice_height;
932e204c David Francis 2019-02-13  313  
932e204c David Francis 2019-02-13  314  	/* slice_bpg_offset is 16 bit value with 11 fractional bits */
932e204c David Francis 2019-02-13  315  	vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size -
932e204c David Francis 2019-02-13  316  						    vdsc_cfg->initial_offset +
932e204c David Francis 2019-02-13  317  						    num_extra_mux_bits) << 11),
932e204c David Francis 2019-02-13  318  						  groups_total);
932e204c David Francis 2019-02-13  319  
932e204c David Francis 2019-02-13  320  	if (final_scale > 9) {
932e204c David Francis 2019-02-13  321  		/*
932e204c David Francis 2019-02-13  322  		 * ScaleIncrementInterval =
932e204c David Francis 2019-02-13  323  		 * finaloffset/((NflBpgOffset + SliceBpgOffset)*8(finalscale - 1.125))
932e204c David Francis 2019-02-13  324  		 * as (NflBpgOffset + SliceBpgOffset) has 11 bit fractional value,
932e204c David Francis 2019-02-13  325  		 * we need divide by 2^11 from pstDscCfg values
932e204c David Francis 2019-02-13  326  		 */
932e204c David Francis 2019-02-13  327  		vdsc_cfg->scale_increment_interval =
932e204c David Francis 2019-02-13  328  				(vdsc_cfg->final_offset * (1 << 11)) /
932e204c David Francis 2019-02-13  329  				((vdsc_cfg->nfl_bpg_offset +
932e204c David Francis 2019-02-13  330  				vdsc_cfg->slice_bpg_offset) *
932e204c David Francis 2019-02-13  331  				(final_scale - 9));
932e204c David Francis 2019-02-13  332  	} else {
932e204c David Francis 2019-02-13  333  		/*
932e204c David Francis 2019-02-13  334  		 * If finalScaleValue is less than or equal to 9, a value of 0 should
932e204c David Francis 2019-02-13  335  		 * be used to disable the scale increment at the end of the slice
932e204c David Francis 2019-02-13  336  		 */
932e204c David Francis 2019-02-13  337  		vdsc_cfg->scale_increment_interval = 0;
932e204c David Francis 2019-02-13  338  	}
932e204c David Francis 2019-02-13  339  
932e204c David Francis 2019-02-13 @340  	if (vdsc_cfg->scale_increment_interval > 65535) {

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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