From: Kevin Wang <Kevin1.Wang@xxxxxxx> This patch implements smu dpm context functions for smu v11. Signed-off-by: Kevin Wang <Kevin1.Wang@xxxxxxx> Reviewed-by: Huang Rui <ray.huang@xxxxxxx> --- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 6 ++++ drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 26 ++++++++++++++++++ drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 38 ++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 16f11a4..0fce87c 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -49,6 +49,11 @@ struct smu_table_context uint32_t table_count; }; +struct smu_dpm_context { + void *dpm_context; + uint32_t dpm_context_size; +}; + struct smu_context { struct amdgpu_device *adev; @@ -57,6 +62,7 @@ struct smu_context struct mutex mutex; struct smu_table_context smu_table; + struct smu_dpm_context smu_dpm; }; struct smu_funcs diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h index 6ba5bde..c7fccce 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -36,6 +36,32 @@ #define smnMP0_FW_INTF 0x30101c0 #define smnMP1_PUB_CTRL 0x3010b14 + +struct smu_11_0_dpm_table { + uint32_t min; /* MHz */ + uint32_t max; /* MHz */ +}; + +struct smu_11_0_dpm_tables { + struct smu_11_0_dpm_table soc_table; + struct smu_11_0_dpm_table gfx_table; + struct smu_11_0_dpm_table uclk_table; + struct smu_11_0_dpm_table eclk_table; + struct smu_11_0_dpm_table vclk_table; + struct smu_11_0_dpm_table dclk_table; + struct smu_11_0_dpm_table dcef_table; + struct smu_11_0_dpm_table pixel_table; + struct smu_11_0_dpm_table display_table; + struct smu_11_0_dpm_table phy_table; + struct smu_11_0_dpm_table fclk_table; +}; + +struct smu_11_0_dpm_context { + struct smu_11_0_dpm_tables dpm_tables; + uint32_t workload_policy_mask; + uint32_t dcef_min_ds_clk; +}; + void smu_v11_0_set_smu_funcs(struct smu_context *smu); #endif diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index a2794ce..64125ee 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -234,10 +234,40 @@ static int smu_v11_0_read_pptable_from_vbios(struct smu_context *smu) return 0; } +static int smu_v11_0_init_dpm_context(struct smu_context *smu) +{ + struct smu_dpm_context *smu_dpm = &smu->smu_dpm; + + if (smu_dpm->dpm_context || smu_dpm->dpm_context_size != 0) + return -EINVAL; + + smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context), GFP_KERNEL); + if (!smu_dpm->dpm_context) + return -ENOMEM; + smu_dpm->dpm_context_size = sizeof(struct smu_11_0_dpm_context); + + return 0; +} + +static int smu_v11_0_fini_dpm_context(struct smu_context *smu) +{ + struct smu_dpm_context *smu_dpm = &smu->smu_dpm; + + if (!smu_dpm->dpm_context || smu_dpm->dpm_context_size == 0) + return -EINVAL; + + kfree(smu_dpm->dpm_context); + smu_dpm->dpm_context = NULL; + smu_dpm->dpm_context_size = 0; + + return 0; +} + static int smu_v11_0_init_smc_tables(struct smu_context *smu) { struct smu_table_context *smu_table = &smu->smu_table; struct smu_table *tables = NULL; + int ret = 0; if (smu_table->tables || smu_table->table_count != 0) return -EINVAL; @@ -258,12 +288,17 @@ static int smu_v11_0_init_smc_tables(struct smu_context *smu) SMU_TABLE_INIT(tables, TABLE_OVERDRIVE, sizeof(OverDriveTable_t), PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM); + ret = smu_v11_0_init_dpm_context(smu); + if (ret) + return ret; + return 0; } static int smu_v11_0_fini_smc_tables(struct smu_context *smu) { struct smu_table_context *smu_table = &smu->smu_table; + int ret = 0; if (!smu_table->tables || smu_table->table_count == 0) return -EINVAL; @@ -272,6 +307,9 @@ static int smu_v11_0_fini_smc_tables(struct smu_context *smu) smu_table->tables = NULL; smu_table->table_count = 0; + ret = smu_v11_0_fini_dpm_context(smu); + if (ret) + return ret; return 0; } -- 2.7.4 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx