Re: [PATCH] drm: enable uncached DMA optimization for ARM and arm64

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Am 24.01.19 um 13:06 schrieb Ard Biesheuvel:
> The DRM driver stack is designed to work with cache coherent devices
> only, but permits an optimization to be enabled in some cases, where
> for some buffers, both the CPU and the GPU use uncached mappings,
> removing the need for DMA snooping and allocation in the CPU caches.
>
> The use of uncached GPU mappings relies on the correct implementation
> of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
> will use cached mappings nonetheless. On x86 platforms, this does not
> seem to matter, as uncached CPU mappings will snoop the caches in any
> case. However, on ARM and arm64, enabling this optimization on a
> platform where NoSnoop is ignored results in loss of coherency, which
> breaks correct operation of the device. Since we have no way of
> detecting whether NoSnoop works or not, just disable this
> optimization entirely for ARM and arm64.
>
> Cc: Christian Koenig <christian.koenig@xxxxxxx>
> Cc: Alex Deucher <alexander.deucher@xxxxxxx>
> Cc: David Zhou <David1.Zhou@xxxxxxx>
> Cc: Huang Rui <ray.huang@xxxxxxx>
> Cc: Junwei Zhang <Jerry.Zhang@xxxxxxx>
> Cc: Michel Daenzer <michel.daenzer@xxxxxxx>
> Cc: David Airlie <airlied@xxxxxxxx>
> Cc: Daniel Vetter <daniel@xxxxxxxx>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Cc: Maxime Ripard <maxime.ripard@xxxxxxxxxxx>
> Cc: Sean Paul <sean@xxxxxxxxxx>
> Cc: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
> Cc: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
> Cc: Will Deacon <will.deacon@xxxxxxx>
> Cc: Christoph Hellwig <hch@xxxxxxxxxxxxx>
> Cc: Robin Murphy <robin.murphy@xxxxxxx>
> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
> Cc: dri-devel <dri-devel@xxxxxxxxxxxxxxxxxxxxx>
> Reported-by: Carsten Haitzler <Carsten.Haitzler@xxxxxxx>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>

The subject line should probably read "disable uncached...".

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig@xxxxxxx>.

Regards,
Christian.

> ---
>   include/drm/drm_cache.h | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
>
> diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
> index bfe1639df02d..97fc498dc767 100644
> --- a/include/drm/drm_cache.h
> +++ b/include/drm/drm_cache.h
> @@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memory(void)
>   	return false;
>   #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
>   	return false;
> +#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
> +	/*
> +	 * The DRM driver stack is designed to work with cache coherent devices
> +	 * only, but permits an optimization to be enabled in some cases, where
> +	 * for some buffers, both the CPU and the GPU use uncached mappings,
> +	 * removing the need for DMA snooping and allocation in the CPU caches.
> +	 *
> +	 * The use of uncached GPU mappings relies on the correct implementation
> +	 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
> +	 * will use cached mappings nonetheless. On x86 platforms, this does not
> +	 * seem to matter, as uncached CPU mappings will snoop the caches in any
> +	 * case. However, on ARM and arm64, enabling this optimization on a
> +	 * platform where NoSnoop is ignored results in loss of coherency, which
> +	 * breaks correct operation of the device. Since we have no way of
> +	 * detecting whether NoSnoop works or not, just disable this
> +	 * optimization entirely for ARM and arm64.
> +	 */
> +	return false;
>   #else
>   	return true;
>   #endif

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