addr = (max_pfn - (AMDGPU_VA_RESERVED_SIZE >> AMDGPU_PAGE_SHIFT)) << AMDGPU_PAGE_SHIFT;
now max_pfn = 0x10 0000 0000, AMDGPU_VA_RESERVED_SIZE = 0x10 0000, AMDGPU_PAGE_SHIFT = 12
Still got addr = 0xFFFF FFF0 0000, which would cause ring gfx timeout.
Before commit 1bf621c42137926ac249af761c0190a9258aa0db, vm_size was 32GB, and csa_addr was under AMDGPU_GMC_HOLE_START.
I didn’t understand why csa_addr need to be above AMDGPU_GMC_HOLE_START now.
Thanks.
Hi Christian,
Now vm_size was set to
0x4 0000 GB by below commit:
1bf621c42137926ac249af761c0190a9258aa0db drm/amdgpu: Remove unnecessary VM size calculations
So that max_pfn would be
0x10 0000 0000.
amdgpu_csa_vaddr would make max_pfn << 12 to get 0x1 0000 0000 0000, and then minus AMDGPU_VA_RESERVED_SIZE, to get
0xFFFF FFF0 0000
unfortunately this number was between AMDGPU_GMC_HOLE_START and AMDGPU_GMC_HOLE_END, so that amdgpu_gmc_sign_extend was called to make it
0xFFFF FFFF FFF0 0000
in amdgpu_driver_open_kms, extended csa_addr cannot be passed into amdgpu_map_static_csa directly, it would be above the limit of max_pfn.
So that csa_addr was restricted by AMDGPU_GMC_HOLE_MASK to make it possible for amdgpu_vm_alloc_pts.
But this restriction by AMDGPU_GMC_HOLE_MASK would make the address fall back into AMDGPU_GMC_HOLE again, which causing GPU reset.
We just put amdgpu_csa_vaddr back to AMDGPU_GMC_HOLE_START, to avoid the address touching AMDGPU_GMC_HOLE.
By the way, if max_pfn was shift much to the left, it would always get zero, with or without min(*,*).
BR,
Wentao
-----Original Message-----
From: Koenig, Christian <Christian.Koenig@xxxxxxx>
Sent: Tuesday, January 15, 2019 4:02 PM
To: Liu, Monk <Monk.Liu@xxxxxxx>; Lou, Wentao
<Wentao.Lou@xxxxxxx>;
amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhu, Rex <Rex.Zhu@xxxxxxx>
Subject: Re: [PATCH] drm/amdgpu: csa_vaddr should not larger than AMDGPU_GMC_HOLE_START
Am 15.01.19 um 07:19 schrieb Liu, Monk:
> The max_pfn is now 1'0000'0000'0000'0000 (bytes) which is above 48 bit now, and it with AMDGPU_GMC_HOLE_MASK make it to zero ....
>
> And in code "amdgpu_driver_open_kms()" I saw @Zhu, Rex write the code as :
>
> "csa_addr = amdgpu_csa_vadr(adev) & AMDGPU_GMC_HOLE_MASK", I think this is wrong since you intentionally place the csa above GMC hole, right ?
The fix is just completely incorrect since min(adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT, AMDGPU_GMC_HOLE_START) still gives you 0 when we shift max_pfn to much to the left.
The correct solution is to substract the reserved size first and then shift. E.g.:
addr = (max_pfn - (AMDGPU_VA_RESERVED_SIZE >> AMDGPU_PAGE_SHIFT)) << AMDGPU_PAGE_SHIFT;
Regards,
Christian.
>
> Looks like we should modify this place
>
> /Monk
>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Christian K?nig
> Sent: Monday, January 14, 2019 9:05 PM
> To: Lou, Wentao <Wentao.Lou@xxxxxxx>;
amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH] drm/amdgpu: csa_vaddr should not larger than
> AMDGPU_GMC_HOLE_START
>
> Am 14.01.19 um 09:40 schrieb wentalou:
>> After removing unnecessary VM size calculations, vm_manager.max_pfn
>> would reach 0x10,0000,0000 max_pfn << AMDGPU_GPU_PAGE_SHIFT exceeding
>> AMDGPU_GMC_HOLE_START would caused GPU reset.
>>
>> Change-Id: I47ad0be2b0bd9fb7490c4e1d7bb7bdacf71132cb
>> Signed-off-by: wentalou <Wentao.Lou@xxxxxxx>
> NAK, that is incorrect. We intentionally place the csa above the GMC hole.
>
> Regards,
> Christian.
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
>> index 7e22be7..dd3bd01 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
>> @@ -26,7 +26,8 @@
>>
>> uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
>> {
>> - uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
>> + uint64_t addr = min(adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT,
>> + AMDGPU_GMC_HOLE_START);
>>
>> addr -= AMDGPU_VA_RESERVED_SIZE;
>> addr = amdgpu_gmc_sign_extend(addr);
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