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>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Emily
>Deng
>Sent: Saturday, December 29, 2018 5:56 PM
>To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
>Cc: Deng, Emily <Emily.Deng@xxxxxxx>
>Subject: [PATCH] drm/amdgpu/sriov:Correct pfvf exchange logic
>
>The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu reset.
>
>Signed-off-by: Emily Deng <Emily.Deng@xxxxxxx>
>---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>index 98df8e4..7ff3a28 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>@@ -1701,8 +1701,10 @@ static int amdgpu_device_ip_init(struct
>amdgpu_device *adev)
> amdgpu_xgmi_add_device(adev);
> amdgpu_amdkfd_device_init(adev);
>
>- if (amdgpu_sriov_vf(adev))
>+ if (amdgpu_sriov_vf(adev)) {
>+ amdgpu_virt_init_data_exchange(adev);
> amdgpu_virt_release_full_gpu(adev, true);
>+ }
>
> return 0;
> }
>@@ -2632,9 +2634,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> goto failed;
> }
>
>- if (amdgpu_sriov_vf(adev))
>- amdgpu_virt_init_data_exchange(adev);
>-
> amdgpu_fbdev_init(adev);
>
> r = amdgpu_pm_sysfs_init(adev);
>@@ -3226,6 +3225,7 @@ static int amdgpu_device_reset_sriov(struct
>amdgpu_device *adev,
> r = amdgpu_ib_ring_tests(adev);
>
> error:
>+ amdgpu_virt_init_data_exchange(adev);
> amdgpu_virt_release_full_gpu(adev, true);
> if (!r && adev->virt.gim_feature &
>AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
> atomic_inc(&adev->vram_lost_counter);
>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>index 8cbb465..b11a1c17 100644
>--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>@@ -174,7 +174,7 @@ static int xgpu_ai_send_access_requests(struct
>amdgpu_device *adev,
> return r;
> }
> /* Retrieve checksum from mailbox2 */
>- if (req == IDH_REQ_GPU_INIT_ACCESS) {
>+ if (req == IDH_REQ_GPU_INIT_ACCESS || req ==
>+IDH_REQ_GPU_RESET_ACCESS) {
> adev->virt.fw_reserve.checksum_key =
> RREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0,
>
> mmBIF_BX_PF0_MAILBOX_MSGBUF_RCV_DW2));
>--
>2.7.4
>
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