Reviewed-by: Evan Quan <evan.quan@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex
> Deucher
> Sent: 2018年12月7日 0:29
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> Subject: [PATCH 3/3] drm/amdgpu/powerplay: check MC firmware for FFC
> support
>
> Check if the MC firmware supports FFC and tell the SMC so mclk switching is
> handled properly.
>
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 6bfbfd37ed92..d94c7d03bf24 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -4222,9 +4222,17 @@ static int smu7_check_mc_firmware(struct
> pp_hwmgr *hwmgr)
> if (tmp & (1 << 23)) {
> data->mem_latency_high = MEM_LATENCY_HIGH;
> data->mem_latency_low = MEM_LATENCY_LOW;
> + if ((hwmgr->chip_id == CHIP_POLARIS10) ||
> + (hwmgr->chip_id == CHIP_POLARIS11) ||
> + (hwmgr->chip_id == CHIP_POLARIS12))
> + smum_send_msg_to_smc(hwmgr,
> PPSMC_MSG_EnableFFC);
> } else {
> data->mem_latency_high = 330;
> data->mem_latency_low = 330;
> + if ((hwmgr->chip_id == CHIP_POLARIS10) ||
> + (hwmgr->chip_id == CHIP_POLARIS11) ||
> + (hwmgr->chip_id == CHIP_POLARIS12))
> + smum_send_msg_to_smc(hwmgr,
> PPSMC_MSG_DisableFFC);
> }
>
> return 0;
> --
> 2.13.6
>
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