Re: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

["S, Shirish" <Shirish.S@xxxxxxx>]

This is for the devices with type-c ports.

Wherein the signal type is same 32 (DISPLAY PORT)  for both HDMI and DP  monitors connected to the system via type-c dongles/convertors.

Regards,

Shirish S

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From: Deucher, Alexander
Sent: Wednesday, November 28, 2018 12:06:26 AM
To: S, Shirish; Li, Sun peng (Leo); Wentland, Harry
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

 

Is this a DP to HDMI adapter?  I think 4k@60 should be valid on DP in general on ST/CZ, but Harry or Leo should comment.

Alex

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From: S, Shirish
Sent: Tuesday, November 27, 2018 3:58:12 AM
To: Deucher, Alexander; Li, Sun peng (Leo); Wentland, Harry
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: RE: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

 

However, while using Type-C connectors noted that the signal type is actually SIGNAL_TYPE_DISPLAY_PORT and found that the check was missing.

Hence have added the same in https://patchwork.freedesktop.org/patch/264033/

 

Regards,

Shirish S

 

From: S, Shirish
Sent: Tuesday, November 27, 2018 9:54 AM
To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: RE: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

 

Thanks Alex, found that patch.

My patch is no more required.

 

 

Regards,

Shirish S

 

From: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Sent: Monday, November 26, 2018 7:46 PM
To: S, Shirish <Shirish.S@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Subject: Re: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

 

I thought there was a patch to do this already that got sent out a few weeks ago.  Basically limit ST/CZ to modes that do not require a retimer.  Is an additional patch needed?

 

Alex

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From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of S, Shirish <Shirish.S@xxxxxxx>
Sent: Monday, November 26, 2018 1:36:30 AM
To: Li, Sun peng (Leo); Wentland, Harry
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; S, Shirish
Subject: [PATCH] drm/amd/display: limit high pixel clock modes on ST/CZ

 

[Why]
ST/CZ (dce110) advertises modes such as 4k@60Hz etc.,
that it cannot handle correctly, hence  resulting in
several issues like flickering, black lines/flashes and so on.

[How]
These modes are basically high pixel clock ones, hence
limit the same to be advertised to avoid bad user experiences

Signed-off-by: Shirish S <shirish.s@xxxxxxx>
Suggested-by: Harry Wentland <harry.wentland@xxxxxxx>
---
 .../gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c    | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
index 1b2fe0d..1b8fe99 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
@@ -1121,6 +1121,16 @@ bool dce110_timing_generator_validate_timing(
         if (!timing)
                 return false;
 
+       /* Limit all modes that have a high pixel clock
+        * which seems to be problematic on dce110
+        * These include: 4k@60Hz, 1080p@144Hz,1440p@120Hz
+        * based on the below formula:
+        * refresh rate = pixel clock / (htotal * vtotal)
+        */
+       if (timing->pix_clk_khz > 300000)
+               return false;
+
+
         hsync_offset = timing->h_border_right + timing->h_front_porch;
         h_sync_start = timing->h_addressable + hsync_offset;
 
--
2.7.4

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