On Wed, Nov 21, 2018 at 5:00 PM Oak Zeng <ozeng@xxxxxxx> wrote: > > v2: Changed file name for consistency > > Change-Id: Ib2c570224321bb7002d2ed01f43ac70203e86f88 > Signed-off-by: Oak Zeng <ozeng@xxxxxxx> > Suggested-by: Felix Kuehling <Felix.Kuehling@xxxxxxx> > Suggested-by: Alex Deucher <alexander.deucher@xxxxxxx> Just drop this patch and use the vega10 definition for vega12 and raven. Alex > --- > drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- > drivers/gpu/drm/amd/amdgpu/soc15.h | 1 + > drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c | 54 ++++++++++++++++++++++++++++ > 3 files changed, 56 insertions(+), 1 deletion(-) > create mode 100644 drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile > index f76bcb9..1cef9e1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/Makefile > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile > @@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce > > amdgpu-y += \ > vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \ > - vega20_reg_init.o nbio_v7_4.o > + vega20_reg_init.o nbio_v7_4.o vega12_reg_init.o > > # add DF block > amdgpu-y += \ > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h > index d37c57d..939c0e8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/soc15.h > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.h > @@ -59,4 +59,5 @@ int vega10_reg_base_init(struct amdgpu_device *adev); > int vega20_reg_base_init(struct amdgpu_device *adev); > > void vega10_doorbell_index_init(struct amdgpu_device *adev); > +void vega12_doorbell_index_init(struct amdgpu_device *adev); > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > new file mode 100644 > index 0000000..71622b5 > --- /dev/null > +++ b/drivers/gpu/drm/amd/amdgpu/vega12_reg_init.c > @@ -0,0 +1,54 @@ > +/* > + * Copyright 2018 Advanced Micro Devices, Inc. > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR > + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, > + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include "amdgpu.h" > + > +void vega12_doorbell_index_init(struct amdgpu_device *adev) > +{ > + adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; > + adev->doorbell_index.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0; > + adev->doorbell_index.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1; > + adev->doorbell_index.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2; > + adev->doorbell_index.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3; > + adev->doorbell_index.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4; > + adev->doorbell_index.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5; > + adev->doorbell_index.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6; > + adev->doorbell_index.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7; > + adev->doorbell_index.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START; > + adev->doorbell_index.userqueue_end = AMDGPU_DOORBELL64_USERQUEUE_END; > + adev->doorbell_index.gfx_ring0 = AMDGPU_DOORBELL64_GFX_RING0; > + adev->doorbell_index.sdma_engine0 = AMDGPU_DOORBELL64_sDMA_ENGINE0; > + adev->doorbell_index.sdma_engine1 = AMDGPU_DOORBELL64_sDMA_ENGINE1; > + adev->doorbell_index.ih = AMDGPU_DOORBELL64_IH; > + adev->doorbell_index.uvd_vce.uvd_ring0_1 = AMDGPU_DOORBELL64_UVD_RING0_1; > + adev->doorbell_index.uvd_vce.uvd_ring2_3 = AMDGPU_DOORBELL64_UVD_RING2_3; > + adev->doorbell_index.uvd_vce.uvd_ring4_5 = AMDGPU_DOORBELL64_UVD_RING4_5; > + adev->doorbell_index.uvd_vce.uvd_ring6_7 = AMDGPU_DOORBELL64_UVD_RING6_7; > + adev->doorbell_index.uvd_vce.vce_ring0_1 = AMDGPU_DOORBELL64_VCE_RING0_1; > + adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3; > + adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5; > + adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7; > + /* In unit of dword doorbell */ > + adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1; > +} > + > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx