On Thu, Oct 25, 2018 at 12:27 PM S, Shirish <Shirish.S@xxxxxxx> wrote:
>
> This reverts commit dbd8299c32f6f413f6cfe322fe0308f3cfc577e8.
>
> Reason for revert:
> This patch sends msg PPSMC_MSG_DisableLowMemoryPstate(0x002e)
> in wrong of sequence to SMU which is before PPSMC_MSG_UVDPowerON (0x0008).
> This leads to SMU failing to service the request as it is
> dependent on UVD to be powered ON, since it accesses UVD
> registers.
Does this patch that is being reverted actually break something or is
it ok to leave as a workaround? It supposedly fixed display issues at
4k with video. Reverting it will bring that back won't it?
Alex
>
> This msg should ideally be sent only when the UVD is about to decode
> a 4k video.
>
> Signed-off-by: Shirish S <shirish.s@xxxxxxx>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> index fef111d..53cf787 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> @@ -1228,17 +1228,14 @@ static int smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
>
> static int smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr)
> {
> - if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) {
> - smu8_nbdpm_pstate_enable_disable(hwmgr, true, true);
> + if (PP_CAP(PHM_PlatformCaps_UVDPowerGating))
> return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF);
> - }
> return 0;
> }
>
> static int smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr)
> {
> if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) {
> - smu8_nbdpm_pstate_enable_disable(hwmgr, false, true);
> return smum_send_msg_to_smc_with_parameter(
> hwmgr,
> PPSMC_MSG_UVDPowerON,
> --
> 2.7.4
>
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