On 2018-09-09 02:03 PM, Christian König wrote:
> The fragment size controls only the L1 on Vega/Raven and we now don't
> have any extra overhead any more because of larger fragments.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 5b8c931a5d37..433849d267f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1533,7 +1533,12 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
> * Userspace can support this by aligning virtual base address and
> * allocation size to the fragment size.
Do you want to update the comment here as well with something similar to
the patch description?
Regards,
 Felix
> */
> - unsigned max_frag = params->adev->vm_manager.fragment_size;
> + unsigned max_frag;
> +
> + if (params->adev->asic_type < CHIP_VEGA10)
> + max_frag = params->adev->vm_manager.fragment_size;
> + else
> + max_frag = 31;
>
> /* system pages are non continuously */
> if (params->src || !(flags & AMDGPU_PTE_VALID)) {
