On 08/22/2018 11:05 PM, Christian König wrote: > Add the necessary handling. > > Signed-off-by: Christian König <christian.koenig at amd.com> Looks going to use GTT for page table. What kind of scenario to use that? could it be replaced by CPU updating page table in system memory? Regards, Jerry > --- > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index e412eb8e347c..3393a329fc9c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -571,7 +571,7 @@ static uint64_t gmc_v9_0_get_vm_pte_flags(struct amdgpu_device *adev, > static void gmc_v9_0_get_vm_pde(struct amdgpu_device *adev, int level, > uint64_t *addr, uint64_t *flags) > { > - if (!(*flags & AMDGPU_PDE_PTE)) > + if (!(*flags & AMDGPU_PDE_PTE) && !(*flags & AMDGPU_PTE_SYSTEM)) > *addr = adev->vm_manager.vram_base_offset + *addr - > adev->gmc.vram_start; > BUG_ON(*addr & 0xFFFF00000000003FULL); >