On Fri, Aug 17, 2018 at 5:35 AM Rex Zhu <Rex.Zhu at amd.com> wrote: > > Send all kcq unmap_queue packets and then wait for > complete. > > Signed-off-by: Rex Zhu <Rex.Zhu at amd.com> This series and the gfx8 series are: Reviewed-by: Alex Deucher <alexander.deucher at amd.com> Longer term, we may want to dynamically map and umap compute queues as part of scheduling compute work to deal with things like priorities and cu masking the the mqds, but that is a future enhancement. Alex > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 33 ++++++++++++++++----------------- > 1 file changed, 16 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index bc90f55..f7d97bd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -3160,28 +3160,29 @@ static int gfx_v9_0_hw_init(void *handle) > return r; > } > > -static int gfx_v9_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring *ring) > +static int gfx_v9_0_kcq_disable(struct amdgpu_device *adev) > { > - int r; > + int r, i; > + struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; > > - r = amdgpu_ring_alloc(kiq_ring, 6); > - if (r) { > + r = amdgpu_ring_alloc(kiq_ring, 6 * adev->gfx.num_compute_rings); > + if (r) > DRM_ERROR("Failed to lock KIQ (%d).\n", r); > - return r; > - } > > - /* unmap queues */ > - amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); > - amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */ > + for (i = 0; i < adev->gfx.num_compute_rings; i++) { > + struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; > + > + amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); > + amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */ > PACKET3_UNMAP_QUEUES_ACTION(1) | /* RESET_QUEUES */ > PACKET3_UNMAP_QUEUES_QUEUE_SEL(0) | > PACKET3_UNMAP_QUEUES_ENGINE_SEL(0) | > PACKET3_UNMAP_QUEUES_NUM_QUEUES(1)); > - amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index)); > - amdgpu_ring_write(kiq_ring, 0); > - amdgpu_ring_write(kiq_ring, 0); > - amdgpu_ring_write(kiq_ring, 0); > - > + amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index)); > + amdgpu_ring_write(kiq_ring, 0); > + amdgpu_ring_write(kiq_ring, 0); > + amdgpu_ring_write(kiq_ring, 0); > + } > r = amdgpu_ring_test_ring(kiq_ring); > if (r) > DRM_ERROR("KCQ disable failed\n"); > @@ -3192,14 +3193,12 @@ static int gfx_v9_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring > static int gfx_v9_0_hw_fini(void *handle) > { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > - int i; > > amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); > amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); > > /* disable KCQ to avoid CPC touch memory not valid anymore */ > - for (i = 0; i < adev->gfx.num_compute_rings; i++) > - gfx_v9_0_kcq_disable(&adev->gfx.kiq.ring, &adev->gfx.compute_ring[i]); > + gfx_v9_0_kcq_disable(adev); > > if (amdgpu_sriov_vf(adev)) { > gfx_v9_0_cp_gfx_enable(adev, false); > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx