Am 25.07.2018 um 21:43 schrieb James Zhu:
>
> On 2018-07-25 07:05 AM, Christian König wrote:
>> Patch the IBs for the second UVD instance so that userspace don't need
>> to care about the instance they submit to.
>>
>> v2: use direct IB patching
>>
>> Signed-off-by: Christian König <christian.koenig at amd.com>
>> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
>> ---
>> Â drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 27 +++++++++++++++++++++++++++
>> Â 1 file changed, 27 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> index db5f3d78ab12..0895b80fcd37 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> @@ -1205,6 +1205,32 @@ static int uvd_v7_0_ring_test_ring(struct
>> amdgpu_ring *ring)
>> Â Â Â Â Â return r;
>> Â }
>> Â +/**
>> + * uvd_v7_0_enc_ring_test_ring - test if UVD ENC ring is working
>> + *
>> + * @ring: the engine to test on
>> + *
>> + */
>> +static int uvd_v7_0_ring_patch_cs(struct amdgpu_cs_parser *p,
>> uint32_t ib_idx)
>> +{
>> +Â Â Â struct amdgpu_ib *ib = &p->job->ibs[ib_idx];
>> +Â Â Â unsigned i;
>> +
>> +Â Â Â /* No patching necessary for the first instance */
>> +Â Â Â if (!p->ring->me)
>> +Â Â Â Â Â Â Â return 0;
>> +
>> +Â Â Â for (i = 0; i < ib->length_dw; i += 2) {
>> +Â Â Â Â Â Â Â uint32_t reg = amdgpu_get_ib_value(p, ib_idx, i);
>> +
>> +Â Â Â Â Â Â Â reg -= p->adev->reg_offset[UVD_HWIP][0][1];
>> +Â Â Â Â Â Â Â reg += p->adev->reg_offset[UVD_HWIP][1][1];
>> +
>> +Â Â Â Â Â Â Â amdgpu_set_ib_value(p, ib_idx, i, reg);
>> +Â Â Â }
>> +Â Â Â return 0;
>> +}
>> +
>> Â /**
>> Â Â * uvd_v7_0_ring_emit_ib - execute indirect buffer
>> Â Â *
>> @@ -1697,6 +1723,7 @@ static const struct amdgpu_ring_funcs
>> uvd_v7_0_ring_vm_funcs = {
>> Â Â Â Â Â .get_rptr = uvd_v7_0_ring_get_rptr,
>> Â Â Â Â Â .get_wptr = uvd_v7_0_ring_get_wptr,
>> Â Â Â Â Â .set_wptr = uvd_v7_0_ring_set_wptr,
>> +Â Â Â .patch_cs = uvd_v7_0_ring_patch_cs,
> It should be .patch_cs_in_place. With this fix,
Yeah, sorry accidentally send out the original version without the
rebase fixes.
>
> Reviewed-by: James Zhu <James.Zhu at amd.com>
Thanks,
Christian.
>
> James
>
>> Â Â Â Â Â .emit_frame_size =
>> Â Â Â Â Â Â Â Â Â 6 + /* hdp invalidate */
>> Â Â Â Â Â Â Â Â Â SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
>
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