On Thu, Jul 19, 2018 at 4:46 AM, Rex Zhu <rex.zhu at amd.com> wrote:
> when ACP block not enabled, we power off
> acp block to save power.
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++++++++++++++++++
> drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 21 ++++++++++++++++++++-
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
> 3 files changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 7a646f9..da4ebff 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1181,6 +1181,21 @@ static int pp_dpm_powergate_gfx(void *handle, bool gate)
> return hwmgr->hwmgr_func->powergate_gfx(hwmgr, gate);
> }
>
> +static void pp_dpm_powergate_acp(void *handle, bool gate)
> +{
> + struct pp_hwmgr *hwmgr = handle;
> +
> + if (!hwmgr || !hwmgr->pm_en)
> + return;
> +
> + if (hwmgr->hwmgr_func->powergate_acp == NULL) {
> + pr_info("%s was not implemented.\n", __func__);
> + return;
> + }
> +
> + hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
> +}
> +
> static int pp_set_powergating_by_smu(void *handle,
> uint32_t block_type, bool gate)
> {
> @@ -1200,6 +1215,9 @@ static int pp_set_powergating_by_smu(void *handle,
> case AMD_IP_BLOCK_TYPE_GFX:
> ret = pp_dpm_powergate_gfx(handle, gate);
> break;
> + case AMD_IP_BLOCK_TYPE_ACP:
> + pp_dpm_powergate_acp(handle, gate);
> + break;
> default:
> break;
> }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> index 288802f..cafa822 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
> @@ -663,8 +663,13 @@ static void smu8_init_power_gate_state(struct pp_hwmgr *hwmgr)
> data->uvd_power_gated = false;
> data->vce_power_gated = false;
> data->samu_power_gated = false;
> +#ifdef CONFIG_DRM_AMD_ACP
> data->acp_power_gated = false;
> - data->pgacpinit = true;
> +#else
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
> + data->acp_power_gated = true;
> +#endif
> +
> }
>
> static void smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr)
> @@ -1885,6 +1890,19 @@ static int smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)
> }
>
>
> +static void smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
> +{
> + struct smu8_hwmgr *data = hwmgr->backend;
> +
> + if (data->acp_power_gated == bgate)
> + return;
> +
> + if (bgate)
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
> + else
> + smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerON);
> +}
> +
> static void smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
> {
> struct smu8_hwmgr *data = hwmgr->backend;
> @@ -1950,6 +1968,7 @@ static void smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
> .powerdown_uvd = smu8_dpm_powerdown_uvd,
> .powergate_uvd = smu8_dpm_powergate_uvd,
> .powergate_vce = smu8_dpm_powergate_vce,
> + .powergate_acp = smu8_dpm_powergate_acp,
> .get_mclk = smu8_dpm_get_mclk,
> .get_sclk = smu8_dpm_get_sclk,
> .patch_boot_state = smu8_dpm_patch_boot_state,
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index d3d9626..7e58a0d 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -247,6 +247,7 @@ struct pp_hwmgr_func {
> int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
> void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
> void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
> + void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
> uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low);
> uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low);
> int (*power_state_set)(struct pp_hwmgr *hwmgr,
> --
> 1.9.1
>
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> amd-gfx at lists.freedesktop.org
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