[PATCH 38/54] drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer

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On 2018-07-10 12:56 AM, Dave Airlie wrote:
> This has some whitespace changes that don't seem to be related, please
> get people to be a bit more careful.
> 
> (though I do realise this could be magic ifdef stuff that got ripped out :-)
> 

It's the latter. I'm running "unifdef -B" which should compress blank lines around deleted sections, but it doesn't do a great job.

Could clean it up manually but that's a bit painful.

Harry

> Dave.
> 
> 
> On 10 July 2018 at 10:37, Harry Wentland <harry.wentland at amd.com> wrote:
>> From: Eric Bernstein <eric.bernstein at amd.com>
>>
>> Signed-off-by: Eric Bernstein <eric.bernstein at amd.com>
>> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin at amd.com>
>> Acked-by: Harry Wentland <harry.wentland at amd.com>
>> ---
>>  .../gpu/drm/amd/display/dc/core/dc_resource.c |  1 -
>>  drivers/gpu/drm/amd/display/dc/dc_stream.h    |  1 +
>>  .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 59 +++++++++++--------
>>  .../amd/display/dc/dcn10/dcn10_hw_sequencer.h |  7 +++
>>  .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  8 +++
>>  5 files changed, 50 insertions(+), 26 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>> index 41562ffa1c62..cacf59d0a1d6 100644
>> --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
>> @@ -1473,7 +1473,6 @@ bool dc_add_all_planes_for_stream(
>>         return add_all_planes_for_stream(dc, stream, &set, 1, context);
>>  }
>>
>> -
>>  static bool is_hdr_static_meta_changed(struct dc_stream_state *cur_stream,
>>         struct dc_stream_state *new_stream)
>>  {
>> diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
>> index 532b2aff2227..65d08d594628 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
>> @@ -131,6 +131,7 @@ struct dc_stream_update {
>>         struct dc_info_packet *vsc_infopacket;
>>
>>         bool *dpms_off;
>> +
>>  };
>>
>>  bool dc_is_stream_unchanged(
>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
>> index 28dba6a324c1..06cf967b2431 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
>> @@ -849,7 +849,7 @@ static bool dcn10_hw_wa_force_recovery(struct dc *dc)
>>  }
>>
>>
>> -static void dcn10_verify_allow_pstate_change_high(struct dc *dc)
>> +void dcn10_verify_allow_pstate_change_high(struct dc *dc)
>>  {
>>         static bool should_log_hw_state; /* prevent hw state log by default */
>>
>> @@ -1863,8 +1863,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)
>>                 dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);
>>  }
>>
>> -
>> -static void update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
>> +static void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
>>  {
>>         struct hubp *hubp = pipe_ctx->plane_res.hubp;
>>         struct mpcc_blnd_cfg blnd_cfg;
>> @@ -2009,7 +2008,7 @@ static void update_dchubp_dpp(
>>
>>         if (plane_state->update_flags.bits.full_update ||
>>                 plane_state->update_flags.bits.per_pixel_alpha_change)
>> -               update_mpcc(dc, pipe_ctx);
>> +               dc->hwss.update_mpcc(dc, pipe_ctx);
>>
>>         if (plane_state->update_flags.bits.full_update ||
>>                 plane_state->update_flags.bits.per_pixel_alpha_change ||
>> @@ -2119,6 +2118,33 @@ static void set_hdr_multiplier(struct pipe_ctx *pipe_ctx)
>>                         pipe_ctx->plane_res.dpp, hw_mult);
>>  }
>>
>> +void dcn10_program_pipe(
>> +               struct dc *dc,
>> +               struct pipe_ctx *pipe_ctx,
>> +               struct dc_state *context)
>> +{
>> +       if (pipe_ctx->plane_state->update_flags.bits.full_update)
>> +               dcn10_enable_plane(dc, pipe_ctx, context);
>> +
>> +       update_dchubp_dpp(dc, pipe_ctx, context);
>> +
>> +       set_hdr_multiplier(pipe_ctx);
>> +
>> +       if (pipe_ctx->plane_state->update_flags.bits.full_update ||
>> +                       pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
>> +                       pipe_ctx->plane_state->update_flags.bits.gamma_change)
>> +               dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
>> +
>> +       /* dcn10_translate_regamma_to_hw_format takes 750us to finish
>> +        * only do gamma programming for full update.
>> +        * TODO: This can be further optimized/cleaned up
>> +        * Always call this for now since it does memcmp inside before
>> +        * doing heavy calculation and programming
>> +        */
>> +       if (pipe_ctx->plane_state->update_flags.bits.full_update)
>> +               dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
>> +}
>> +
>>  static void program_all_pipe_in_tree(
>>                 struct dc *dc,
>>                 struct pipe_ctx *pipe_ctx,
>> @@ -2140,26 +2166,7 @@ static void program_all_pipe_in_tree(
>>         }
>>
>>         if (pipe_ctx->plane_state != NULL) {
>> -               if (pipe_ctx->plane_state->update_flags.bits.full_update)
>> -                       dcn10_enable_plane(dc, pipe_ctx, context);
>> -
>> -               update_dchubp_dpp(dc, pipe_ctx, context);
>> -
>> -               set_hdr_multiplier(pipe_ctx);
>> -
>> -               if (pipe_ctx->plane_state->update_flags.bits.full_update ||
>> -                               pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
>> -                               pipe_ctx->plane_state->update_flags.bits.gamma_change)
>> -                       dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
>> -
>> -               /* dcn10_translate_regamma_to_hw_format takes 750us to finish
>> -                * only do gamma programming for full update.
>> -                * TODO: This can be further optimized/cleaned up
>> -                * Always call this for now since it does memcmp inside before
>> -                * doing heavy calculation and programming
>> -                */
>> -               if (pipe_ctx->plane_state->update_flags.bits.full_update)
>> -                       dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
>> +               dcn10_program_pipe(dc, pipe_ctx, context);
>>         }
>>
>>         if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) {
>> @@ -2284,7 +2291,7 @@ static void dcn10_apply_ctx_for_surface(
>>                         old_pipe_ctx->plane_state &&
>>                         old_pipe_ctx->stream_res.tg == tg) {
>>
>> -                       hwss1_plane_atomic_disconnect(dc, old_pipe_ctx);
>> +                       dc->hwss.plane_atomic_disconnect(dc, old_pipe_ctx);
>>                         removed_pipe[i] = true;
>>
>>                         DC_LOG_DC("Reset mpcc for pipe %d\n",
>> @@ -2578,7 +2585,9 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
>>         .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
>>         .apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
>>         .update_plane_addr = dcn10_update_plane_addr,
>> +       .plane_atomic_disconnect = hwss1_plane_atomic_disconnect,
>>         .update_dchub = dcn10_update_dchub,
>> +       .update_mpcc = dcn10_update_mpcc,
>>         .update_pending_status = dcn10_update_pending_status,
>>         .set_input_transfer_func = dcn10_set_input_transfer_func,
>>         .set_output_transfer_func = dcn10_set_output_transfer_func,
>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
>> index 44f734b73f9e..7139fb73e966 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
>> @@ -39,4 +39,11 @@ bool is_rgb_cspace(enum dc_color_space output_color_space);
>>
>>  void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
>>
>> +void dcn10_verify_allow_pstate_change_high(struct dc *dc);
>> +
>> +void dcn10_program_pipe(
>> +               struct dc *dc,
>> +               struct pipe_ctx *pipe_ctx,
>> +               struct dc_state *context);
>> +
>>  #endif /* __DC_HWSS_DCN10_H__ */
>> diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
>> index 2506601120af..c2277d1e195b 100644
>> --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
>> +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
>> @@ -102,10 +102,18 @@ struct hw_sequencer_funcs {
>>                 const struct dc *dc,
>>                 struct pipe_ctx *pipe_ctx);
>>
>> +       void (*plane_atomic_disconnect)(
>> +               struct dc *dc,
>> +               struct pipe_ctx *pipe_ctx);
>> +
>>         void (*update_dchub)(
>>                 struct dce_hwseq *hws,
>>                 struct dchub_init_data *dh_data);
>>
>> +       void (*update_mpcc)(
>> +               struct dc *dc,
>> +               struct pipe_ctx *pipe_ctx);
>> +
>>         void (*update_pending_status)(
>>                         struct pipe_ctx *pipe_ctx);
>>
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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