On Wed, Jul 4, 2018 at 12:12 PM, Jiang, Sonny <Sonny.Jiang at amd.com> wrote:
> Hi Alex,
>
>
> IP blocks indexes are not fixed. What's your idea to list them? By asic
> family?
>
>
> enum amd_ip_block_type {
> AMD_IP_BLOCK_TYPE_COMMON,
> AMD_IP_BLOCK_TYPE_GMC,
> AMD_IP_BLOCK_TYPE_IH,
> AMD_IP_BLOCK_TYPE_SMC,
> AMD_IP_BLOCK_TYPE_PSP,
> AMD_IP_BLOCK_TYPE_DCE,
> AMD_IP_BLOCK_TYPE_GFX,
> AMD_IP_BLOCK_TYPE_SDMA,
> AMD_IP_BLOCK_TYPE_UVD,
> AMD_IP_BLOCK_TYPE_VCE,
> AMD_IP_BLOCK_TYPE_ACP,
> AMD_IP_BLOCK_TYPE_VCN
> };
>
The order is not fixed and due to instancing, there may be more than
one of a particular block for each asic, so the order is asic
specific. The driver prints out the list for each asic when it loads.
E.g.,
[ 4.204408] [drm] add ip block number 0 <vi_common>
[ 4.204408] [drm] add ip block number 1 <gmc_v8_0>
[ 4.204409] [drm] add ip block number 2 <tonga_ih>
[ 4.204409] [drm] add ip block number 3 <powerplay>
[ 4.204410] [drm] add ip block number 4 <dm>
[ 4.204411] [drm] add ip block number 5 <gfx_v8_0>
[ 4.204412] [drm] add ip block number 6 <sdma_v3_0>
[ 4.204412] [drm] add ip block number 7 <uvd_v5_0>
[ 4.204413] [drm] add ip block number 8 <vce_v3_0>
So, for the patch, I would just say something like:
"Some asics may not have some IPs or may include multiple instances of
an IP so the ordering various from asic to asic. See the driver
output in the kernel log for the list of IPs on the asic."
Alex
> Thanks,
>
> Sonny
>
>
> ________________________________
> From: Deucher, Alexander
> Sent: Wednesday, July 4, 2018 2:49:17 AM
> To: Qu, Jim; Zhang, Jerry; Jiang, Sonny; amd-gfx at lists.freedesktop.org
> Subject: Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
>
>
> yeah, that's a good idea.
>
>
> Alex
> ________________________________
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Qu, Jim
> <Jim.Qu at amd.com>
> Sent: Wednesday, July 4, 2018 1:14 AM
> To: Zhang, Jerry; Jiang, Sonny; amd-gfx at lists.freedesktop.org
> Subject: ç?å¤?: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
>
> I always confuse any bits definiation about some feature mask. such as
> ip_block_mask, pg_mask, cg_mask, pp_feature_mask. I think other people who
> is not familiar with amdgpu driver may have the same problem.
>
> So, is it possible to detail every bit mask of features?
>
> Thanks
> JimQu
>
> ________________________________________
> å??件人: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> 代表 Zhang, Jerry
> (Junwei) <Jerry.Zhang at amd.com>
> å??é??æ?¶é?´: 2018å¹´7æ??4æ?¥ 12:57:01
> �件人: Jiang, Sonny; amd-gfx at lists.freedesktop.org
> 主�: Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
>
> On 07/04/2018 04:06 AM, Sonny Jiang wrote:
>> Signed-off-by: Sonny Jiang <sonny.jiang at amd.com>
> Acked-by: Junwei Zhang <Jerry.Zhang at amd.com>
>
>> ---
>> Documentation/gpu/amdgpu.rst | 7 +
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 222
>> +++++++++++++++++++++++++++++++-
>> 2 files changed, 222 insertions(+), 7 deletions(-)
>>
>> diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
>> index 765c2a3..a740e49 100644
>> --- a/Documentation/gpu/amdgpu.rst
>> +++ b/Documentation/gpu/amdgpu.rst
>> @@ -5,6 +5,13 @@
>> The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics
>> Core
>> Next (GCN) architecture.
>>
>> +Module Parameters
>> +=================
>> +
>> +The amdgpu driver supports the following module parameters:
>> +
>> +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +
>> Core Driver Infrastructure
>> ==========================
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> index 963578c..caf81ce 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> @@ -1,10 +1,3 @@
>> -/**
>> - * \file amdgpu_drv.c
>> - * AMD Amdgpu driver
>> - *
>> - * \author Gareth Hughes <gareth at valinux.com>
>> - */
>> -
>> /*
>> * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
>> * All Rights Reserved.
>> @@ -136,102 +129,235 @@ int amdgpu_gpu_recovery = -1; /* auto */
>> int amdgpu_emu_mode = 0;
>> uint amdgpu_smu_memory_pool_size = 0;
>>
>> +/**
>> + * DOC: vramlimit (int)
>> + * Restrict the total amount of VRAM in MiB for testing. The default is
>> 0 (Use full VRAM).
>> + */
>> MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
>> module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
>>
>> +/**
>> + * DOC: vis_vramlimit (int)
>> + * Restrict the amount of CPU visible VRAM in MiB for testing. The
>> default is 0 (Use full CPU visible VRAM).
>> + */
>> MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in
>> megabytes");
>> module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);
>>
>> +/**
>> + * DOC: gartsize (uint)
>> + * Restrict the size of GART in Mib (32, 64, etc.) for testing. The
>> default is -1 (The size depends on asic).
>> + */
>> MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64,
>> etc., -1=auto)");
>> module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
>>
>> +/**
>> + * DOC: gttsize (int)
>> + * Restrict the size of GTT domain in MiB for testing. The default is -1
>> (It's VRAM size if 3GB < VRAM < 3/4 RAM,
>> + * otherwise 3/4 RAM size).
>> + */
>> MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 =
>> auto)");
>> module_param_named(gttsize, amdgpu_gtt_size, int, 0600);
>>
>> +/**
>> + * DOC: moverate (int)
>> + * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).
>> + */
>> MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32,
>> 64, etc., -1=auto, 0=1=disabled)");
>> module_param_named(moverate, amdgpu_moverate, int, 0600);
>>
>> +/**
>> + * DOC: benchmark (int)
>> + * Run benchmarks. The default is 0 (Skip benchmarks).
>> + */
>> MODULE_PARM_DESC(benchmark, "Run benchmark");
>> module_param_named(benchmark, amdgpu_benchmarking, int, 0444);
>>
>> +/**
>> + * DOC: test (int)
>> + * Test BO GTT->VRAM and VRAM->GTT GPU copies. The default is 0 (Skip
>> test, only set 1 to run test).
>> + */
>> MODULE_PARM_DESC(test, "Run tests");
>> module_param_named(test, amdgpu_testing, int, 0444);
>>
>> +/**
>> + * DOC: audio (int)
>> + * Set Audio. The default is -1 (Enabled), set 0 to disabled it.
>> + */
>> MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 =
>> enable)");
>> module_param_named(audio, amdgpu_audio, int, 0444);
>>
>> +/**
>> + * DOC: disp_priority (int)
>> + * Set display Priority (0 = auto, 1 = normal, 2 = high). The default is
>> 0.
>> + */
>> MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal,
>> 2 = high)");
>> module_param_named(disp_priority, amdgpu_disp_priority, int, 0444);
>>
>> +/**
>> + * DOC: hw_i2c (int)
>> + * To enable hw i2c engine. The default is 0 (Disabled).
>> + */
>> MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
>> module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444);
>>
>> +/**
>> + * DOC: pcie_gen2 (int)
>> + * To disable PCIE Gen2 mode (0 = disable, 1 = enable). The default is -1
>> (auto, enabled).
>> + */
>> MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 =
>> enable)");
>> module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
>>
>> +/**
>> + * DOC: msi (int)
>> + * To disable MSI functionality (1 = enable, 0 = disable). The default is
>> -1 (auto, enabled).
>> + */
>> MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 =
>> auto)");
>> module_param_named(msi, amdgpu_msi, int, 0444);
>>
>> +/**
>> + * DOC: lockup_timeout (int)
>> + * Set GPU scheduler timeout value in ms. It must be > 0. The default is
>> 10000.
>> + */
>> MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default
>> 10000)");
>> module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
>>
>> +/**
>> + * DOC: dpm (int)
>> + * Override for dynamic power management setting (1 = enable, 0 =
>> disable). The default is -1 (auto).
>> + */
>> MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 =
>> auto)");
>> module_param_named(dpm, amdgpu_dpm, int, 0444);
>>
>> +/**
>> + * DOC: fw_load_type (int)
>> + * Set different firmware loading type for debugging (0 = direct, 1 =
>> SMU, 2 = PSP). The default is -1 (auto).
>> + */
>> MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 =
>> SMU, 2 = PSP, -1 = auto)");
>> module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444);
>>
>> +/**
>> + * DOC: aspm (int)
>> + * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto,
>> enabled).
>> + */
>> MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 =
>> auto)");
>> module_param_named(aspm, amdgpu_aspm, int, 0444);
>>
>> +/**
>> + * DOC: runpm (int)
>> + * Override for runtime power management control for dGPUs in PX/HG
>> laptops. The amdgpu driver can dynamically power down
>> + * the dGPU on PX/HG laptops when it is idle. The default is -1 (auto
>> enable). Setting the value to 0 disables this functionality.
>> + */
>> MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable,
>> -1 = PX only default)");
>> module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
>>
>> +/**
>> + * DOC: ip_block_mask (uint)
>> + * Override what IP blocks are enabled on the GPU. Each GPU is a
>> collection of IP blocks (gfx, display, video, etc.).
>> + * Use this parameter to disable specific blocks. Note that the IP blocks
>> do not have a fixed index (e.g., you might have a device
>> + * with multiple instances of an IP block) so the mask is board specific.
>> The default is 0xffffffff (enable all blocks on a device).
>> + */
>> MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled
>> (default))");
>> module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);
>>
>> +/**
>> + * DOC: bapm (int)
>> + * To disable BAPM (0 = disable). The default -1 (auto, enabled)
>> + */
>> MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 =
>> auto)");
>> module_param_named(bapm, amdgpu_bapm, int, 0444);
>>
>> +/**
>> + * DOC: deep_color (int)
>> + * Set 1 to enable Deep Color support. The default is 0 (disabled).
>> + */
>> MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 =
>> disable (default))");
>> module_param_named(deep_color, amdgpu_deep_color, int, 0444);
>>
>> +/**
>> + * DOC: vm_size (int)
>> + * Override the size of the GPU's per client virtual address space in
>> GiB. The default is -1 (automatic for each asic).
>> + */
>> MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default
>> 64GB)");
>> module_param_named(vm_size, amdgpu_vm_size, int, 0444);
>>
>> +/**
>> + * DOC: vm_fragment_size (int)
>> + * Override VM fragment size in bits (4, 5, etc. 4 = 64K, 9 = 2M). The
>> default is -1 (automatic for each asic).
>> + */
>> MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc.
>> 4 = 64K (default), Max 9 = 2M)");
>> module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int,
>> 0444);
>>
>> +/**
>> + * DOC: vm_block_size (int)
>> + * Override VM page table size in bits (default depending on vm_size and
>> hw setup). The default is -1 (automatic for each asic).
>> + */
>> MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default
>> depending on vm_size)");
>> module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);
>>
>> +/**
>> + * DOC: vm_fault_stop (int)
>> + * Stop on VM fault for debugging (0 = never, 1 = print first, 2 =
>> always). The default is 0 (No stop).
>> + */
>> MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default),
>> 1 = print first, 2 = always)");
>> module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444);
>>
>> +/**
>> + * DOC: vm_debug (int)
>> + * Debug VM handling (0 = disabled, 1 = enabled). The default is 0
>> (Disabled).
>> + */
>> MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1
>> = enabled)");
>> module_param_named(vm_debug, amdgpu_vm_debug, int, 0644);
>>
>> +/**
>> + * DOC: vm_update_mode (int)
>> + * Override VM update mode. VM updated by using CPU (0 = never, 1 =
>> Graphics only, 2 = Compute only, 3 = Both). The default
>> + * is -1 (Only in large BAR(LB) systems Compute VM tables will be updated
>> by CPU, otherwise 0, never).
>> + */
>> MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never
>> (default except for large BAR(LB)), 1 = Graphics only, 2 = Compute only
>> (default for LB), 3 = Both");
>> module_param_named(vm_update_mode, amdgpu_vm_update_mode, int, 0444);
>>
>> +/**
>> + * DOC: vram_page_split (int)
>> + * Override the number of pages after we split VRAM allocations (default
>> 512, -1 = disable). The default is 512.
>> + */
>> MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM
>> allocations (default 512, -1 = disable)");
>> module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444);
>>
>> +/**
>> + * DOC: exp_hw_support (int)
>> + * Enable experimental hw support (1 = enable). The default is 0
>> (disabled).
>> + */
>> MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0
>> = disable (default))");
>> module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);
>>
>> +/**
>> + * DOC: dc (int)
>> + * Disable/Enable Display Core driver for debugging (1 = enable, 0 =
>> disable). The default is -1 (automatic for each asic).
>> + */
>> MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 =
>> auto (default))");
>> module_param_named(dc, amdgpu_dc, int, 0444);
>>
>> MODULE_PARM_DESC(dc_log, "Display Core Log Level (0 = minimal (default),
>> 1 = chatty");
>> module_param_named(dc_log, amdgpu_dc_log, int, 0444);
>>
>> +/**
>> + * DOC: sched_jobs (int)
>> + * Override the max number of jobs supported in the sw queue. The default
>> is 32.
>> + */
>> MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw
>> queue (default 32)");
>> module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
>>
>> +/**
>> + * DOC: sched_hw_submission (int)
>> + * Override the max number of HW submissions. The default is 2.
>> + */
>> MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions
>> (default 2)");
>> module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int,
>> 0444);
>>
>> +/**
>> + * DOC: ppfeaturemask (uint)
>> + * Override what power features are enabled. The default is 0xffff3fff
>> (gfxoff(bit 15), overdriver(bit 14) disabled).
>> + */
>> MODULE_PARM_DESC(ppfeaturemask, "all power features enabled
>> (default))");
>> module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444);
>>
>> @@ -241,58 +367,129 @@ module_param_named(no_evict, amdgpu_no_evict, int,
>> 0444);
>> MODULE_PARM_DESC(direct_gma_size, "Direct GMA size in megabytes (max
>> 96MB)");
>> module_param_named(direct_gma_size, amdgpu_direct_gma_size, int, 0444);
>>
>> +/**
>> + * DOC: pcie_gen_cap (uint)
>> + * Override PCIE gen speed capabilities. The default is 0 (automatic for
>> each asic).
>> + */
>> MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect
>> (default))");
>> module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);
>>
>> +/**
>> + * DOC: pcie_lane_cap (uint)
>> + * Override PCIE lanes capabilities. The default is 0 (automatic for each
>> asic).
>> + */
>> MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect
>> (default))");
>> module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
>>
>> +/**
>> + * DOC: cg_mask (uint)
>> + * Override what Clockgating features are enabled on GPU (0 = disable
>> clock gating). The default is 0xffffffff (all enabled).
>> + */
>> MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock
>> gating)");
>> module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
>>
>> +/**
>> + * DOC: pg_mask (uint)
>> + * Override what Powergating features are enabled on GPU (0 = disable
>> power gating). The default is 0xffffffff (all enabled).
>> + */
>> MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power
>> gating)");
>> module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
>>
>> +/**
>> + * DOC: sdma_phase_quantum (uint)
>> + * Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 =
>> no change). The default is 32.
>> + */
>> MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum
>> (x 1K GPU clock cycles, 0 = no change (default 32))");
>> module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint,
>> 0444);
>>
>> +/**
>> + * DOC: disable_cu (charp)
>> + * Set to disable CUs (It's set like se.sh.cu,...). The default is NULL.
>> + */
>> MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
>> module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
>>
>> +/**
>> + * DOC: virtual_display (charp)
>> + * Set to enable virtual display feature. This feature provides a virtual
>> display hardware on headless boards
>> + * or in virtualized environments. It will be set like
>> xxxx:xx:xx.x,x;xxxx:xx:xx.x,x. The default is NULL.
>> + */
>> MODULE_PARM_DESC(virtual_display,
>> "Enable virtual display feature (the virtual_display will
>> be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)");
>> module_param_named(virtual_display, amdgpu_virtual_display, charp,
>> 0444);
>>
>> +/**
>> + * DOC: ngg (int)
>> + * Set to enable Next Generation Graphics (1 = enable). The default is 0
>> (disabled).
>> + */
>> MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 =
>> disable(default depending on gfx))");
>> module_param_named(ngg, amdgpu_ngg, int, 0444);
>>
>> +/**
>> + * DOC: prim_buf_per_se (int)
>> + * Override the size of Primitive Buffer per Shader Engine in Byte. The
>> default is 0 (depending on gfx).
>> + */
>> MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per
>> Shader Engine (default depending on gfx)");
>> module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444);
>>
>> +/**
>> + * DOC: pos_buf_per_se (int)
>> + * Override the size of Position Buffer per Shader Engine in Byte. The
>> default is 0 (depending on gfx).
>> + */
>> MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader
>> Engine (default depending on gfx)");
>> module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444);
>>
>> +/**
>> + * DOC: cntl_sb_buf_per_se (int)
>> + * Override the size of Control Sideband per Shader Engine in Byte. The
>> default is 0 (depending on gfx).
>> + */
>> MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per
>> Shader Engine (default depending on gfx)");
>> module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int,
>> 0444);
>>
>> +/**
>> + * DOC: param_buf_per_se (int)
>> + * Override the size of Off-Chip Pramater Cache per Shader Engine in
>> Byte. The default is 0 (depending on gfx).
>> + */
>> MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Pramater Cache
>> per Shader Engine (default depending on gfx)");
>> module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int,
>> 0444);
>>
>> +/**
>> + * DOC: job_hang_limit (int)
>> + * Set how much time allow a job hang and not drop it. The default is 0.
>> + */
>> MODULE_PARM_DESC(job_hang_limit, "how much time allow a job hang and not
>> drop it (default 0)");
>> module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444);
>>
>> +/**
>> + * DOC: lbpw (int)
>> + * Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 =
>> disable). The default is -1 (auto, enabled).
>> + */
>> MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 =
>> enable, 0 = disable, -1 = auto)");
>> module_param_named(lbpw, amdgpu_lbpw, int, 0444);
>>
>> MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread
>> across pipes (1 = enable, 0 = disable, -1 = auto)");
>> module_param_named(compute_multipipe, amdgpu_compute_multipipe, int,
>> 0444);
>>
>> +/**
>> + * DOC: gpu_recovery (int)
>> + * Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The
>> default is -1 (auto, disabled except SRIOV).
>> + */
>> MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 =
>> enable, 0 = disable, -1 = auto)");
>> module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
>>
>> +/**
>> + * DOC: emu_mode (int)
>> + * Set value 1 to enable emulation mode. The default is 0 (disabled).
>> + */
>> MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
>> module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
>>
>> +/**
>> + * DOC: si_support (int)
>> + * Set SI support driver. This parameter works after set config
>> CONFIG_DRM_AMDGPU_SI. For SI asic, when radeon driver is enabled,
>> + * set value 0 to use radeon driver, while set value 1 to use amdgpu
>> driver. The default is using radeon driver when it available,
>> + * otherwise using amdgpu driver.
>> + */
>> #ifdef CONFIG_DRM_AMDGPU_SI
>>
>> #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
>> @@ -306,6 +503,12 @@ MODULE_PARM_DESC(si_support, "SI support (1 = enabled
>> (default), 0 = disabled)")
>> module_param_named(si_support, amdgpu_si_support, int, 0444);
>> #endif
>>
>> +/**
>> + * DOC: cik_support (int)
>> + * Set CIK support driver. This parameter works after set config
>> CONFIG_DRM_AMDGPU_CIK. For CIK asic, when radeon driver is enabled,
>> + * set value 0 to use radeon driver, while set value 1 to use amdgpu
>> driver. The default is using radeon driver when it available,
>> + * otherwise using amdgpu driver.
>> + */
>> #ifdef CONFIG_DRM_AMDGPU_CIK
>>
>> #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
>> @@ -319,6 +522,11 @@ MODULE_PARM_DESC(cik_support, "CIK support (1 =
>> enabled (default), 0 = disabled)
>> module_param_named(cik_support, amdgpu_cik_support, int, 0444);
>> #endif
>>
>> +/**
>> + * DOC: smu_memory_pool_size (uint)
>> + * It is used to reserve gtt for smu debug usage, setting value 0 to
>> disable it. The actual size is value * 256MiB.
>> + * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The
>> default is 0 (disabled).
>> + */
>> MODULE_PARM_DESC(smu_memory_pool_size,
>> "reserve gtt for smu debug usage, 0 = disable,"
>> "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 =
>> 2GByte");
>>
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