Am 04.07.2018 um 17:04 schrieb Andrey Grodzovsky:
> Add process and thread names and pids and a function to extract
> this info from relevant amdgpu_vm.
>
> v2: Add documentation and fix identation.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 21 +++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 14 ++++++++++++++
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 712af5c..845f73a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -2942,3 +2942,24 @@ int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
>
> return 0;
> }
> +
> +/**
> + * amdgpu_vm_task_info - Extracts task info for a PASID.
> + *
> + * @dev: drm device pointer
> + * @pasid: PASID identifier for VM
> + * @task_info: task_info to fill.
> + */
> +void amdgpu_vm_task_info(struct amdgpu_device *adev, unsigned int pasid,
> + struct amdgpu_task_info *task_info)
> +{
> + struct amdgpu_vm *vm;
> +
> + spin_lock(&adev->vm_manager.pasid_lock);
> +
> + vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
> + if (vm)
> + *task_info = vm->task_info;
> +
> + spin_unlock(&adev->vm_manager.pasid_lock);
> +}
As David suggested as well I would both add the
amdgpu_vm_get_task_info() and amdgpu_vm_set_task_info() calls in this
patch and then wire up everything in the second path.
Apart from that looks good to me,
Christian.
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 061b99a..cd4025e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -164,6 +164,14 @@ struct amdgpu_vm_pt {
> #define AMDGPU_VM_FAULT_PASID(fault) ((u64)(fault) >> 48)
> #define AMDGPU_VM_FAULT_ADDR(fault) ((u64)(fault) & 0xfffffffff000ULL)
>
> +
> +struct amdgpu_task_info {
> + char process_name[TASK_COMM_LEN];
> + char task_name[TASK_COMM_LEN];
> + pid_t pid;
> + pid_t tgid;
> +};
> +
> struct amdgpu_vm {
> /* tree of virtual addresses mapped */
> struct rb_root_cached va;
> @@ -215,6 +223,9 @@ struct amdgpu_vm {
>
> /* Valid while the PD is reserved or fenced */
> uint64_t pd_phys_addr;
> +
> + /* Some basic info about the task */
> + struct amdgpu_task_info task_info;
> };
>
> struct amdgpu_vm_manager {
> @@ -317,4 +328,7 @@ bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
> struct amdgpu_job *job);
> void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev);
>
> +void amdgpu_vm_task_info(struct amdgpu_device *adev, unsigned int pasid,
> + struct amdgpu_task_info *task_info);
> +
> #endif
