On Wed, Jun 20, 2018 at 4:19 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Missed to set some clock requests and display info which were needed
> by powerplay.
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> index 329cf3a..f348c6f 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> @@ -77,6 +77,7 @@ bool dm_pp_apply_display_requirements(
> const struct dm_pp_display_configuration *pp_display_cfg)
> {
> struct amdgpu_device *adev = ctx->driver_context;
> + int i;
>
> if (adev->pm.dpm_enabled) {
>
> @@ -107,6 +108,9 @@ bool dm_pp_apply_display_requirements(
> adev->pm.pm_display_cfg.min_mem_set_clock =
> pp_display_cfg->min_memory_clock_khz/10;
>
> + adev->pm.pm_display_cfg.min_dcef_deep_sleep_set_clk = pp_display_cfg->min_engine_clock_deep_sleep_khz / 10;
> + adev->pm.pm_display_cfg.min_dcef_set_clk = pp_display_cfg->min_dcfclock_khz / 10;
> +
> adev->pm.pm_display_cfg.multi_monitor_in_sync =
> pp_display_cfg->all_displays_in_sync;
> adev->pm.pm_display_cfg.min_vblank_time =
> @@ -126,6 +130,11 @@ bool dm_pp_apply_display_requirements(
> adev->pm.pm_display_cfg.crossfire_display_index = -1;
> adev->pm.pm_display_cfg.min_bus_bandwidth = 0;
>
> + for (i = 0; i < pp_display_cfg->display_count; i++) {
> + const struct dm_pp_single_disp_config *dc_cfg =
> + &pp_display_cfg->disp_configs[i];
> + adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1;
> + }
> /* TODO: complete implementation of
> * pp_display_configuration_change().
> * Follow example of:
> --
> 1.9.1
>
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