On Mon, Jun 18, 2018 at 7:18 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> change function parameter type from dm_pp_wm_sets_with_clock_ranges * to
> void *. so this interface can be supported on AI/RV.
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
but should probably be approved by the DC team as well.
Alex
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 2 +-
> drivers/gpu/drm/amd/display/dc/dm_services.h | 2 +-
> drivers/gpu/drm/amd/include/kgd_pp_interface.h | 2 +-
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 +++---
> drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 4 ++--
> drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 3 ++-
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 3 ++-
> drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 3 ++-
> drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 2 +-
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 3 +--
> 10 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> index 37f6a5f..92d36fe 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
> @@ -408,7 +408,7 @@ bool dm_pp_get_clock_levels_by_type_with_voltage(
>
> bool dm_pp_notify_wm_clock_changes(
> const struct dc_context *ctx,
> - struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges)
> + void *clock_ranges)
> {
> /* TODO: to be implemented */
> return false;
> diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
> index 4ff9b2b..535b415 100644
> --- a/drivers/gpu/drm/amd/display/dc/dm_services.h
> +++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
> @@ -217,7 +217,7 @@ bool dm_pp_get_clock_levels_by_type_with_voltage(
>
> bool dm_pp_notify_wm_clock_changes(
> const struct dc_context *ctx,
> - struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
> + void *clock_ranges);
>
> void dm_pp_get_funcs_rv(struct dc_context *ctx,
> struct pp_smu_funcs_rv *funcs);
> diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> index 4535756..06f7ef2 100644
> --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> @@ -261,7 +261,7 @@ struct amd_pm_funcs {
> enum amd_pp_clock_type type,
> struct pp_clock_levels_with_voltage *clocks);
> int (*set_watermarks_for_clocks_ranges)(void *handle,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
> + void *clock_ranges);
> int (*display_clock_voltage_request)(void *handle,
> struct pp_display_clock_request *clock);
> int (*get_display_mode_validation_clocks)(void *handle,
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 7b0ff9d..ba5e0e2 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1103,17 +1103,17 @@ static int pp_get_clock_by_type_with_voltage(void *handle,
> }
>
> static int pp_set_watermarks_for_clocks_ranges(void *handle,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
> + void *clock_ranges)
> {
> struct pp_hwmgr *hwmgr = handle;
> int ret = 0;
>
> - if (!hwmgr || !hwmgr->pm_en ||!wm_with_clock_ranges)
> + if (!hwmgr || !hwmgr->pm_en || !clock_ranges)
> return -EINVAL;
>
> mutex_lock(&hwmgr->smu_lock);
> ret = phm_set_watermarks_for_clocks_ranges(hwmgr,
> - wm_with_clock_ranges);
> + clock_ranges);
> mutex_unlock(&hwmgr->smu_lock);
>
> return ret;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> index a0bb921..53207e7 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> @@ -435,7 +435,7 @@ int phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
> }
>
> int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
> + void *clock_ranges)
> {
> PHM_FUNC_CHECK(hwmgr);
>
> @@ -443,7 +443,7 @@ int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> return -EINVAL;
>
> return hwmgr->hwmgr_func->set_watermarks_for_clocks_ranges(hwmgr,
> - wm_with_clock_ranges);
> + clock_ranges);
> }
>
> int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index 08690c9..4ca8033 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1131,9 +1131,10 @@ static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
> }
>
> static int smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
> + void *clock_ranges)
> {
> struct smu10_hwmgr *data = hwmgr->backend;
> + struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
> Watermarks_t *table = &(data->water_marks_table);
> int result = 0;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 198c7ed..8554ede 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -4195,9 +4195,10 @@ static int vega10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
> }
>
> static int vega10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
> + void *clock_range)
> {
> struct vega10_hwmgr *data = hwmgr->backend;
> + struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range;
> Watermarks_t *table = &(data->smc_state_table.water_marks_table);
> int result = 0;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index d685ce7..bcb64cd 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> @@ -1713,10 +1713,11 @@ static int vega12_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
> }
>
> static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
> + void *clock_ranges)
> {
> struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
> Watermarks_t *table = &(data->smc_state_table.water_marks_table);
> + struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
> int result = 0;
> uint32_t i;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> index a202247..429c9c4 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> @@ -455,7 +455,7 @@ extern int phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
> enum amd_pp_clock_type type,
> struct pp_clock_levels_with_voltage *clocks);
> extern int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
> + void *clock_ranges);
> extern int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
> struct pp_display_clock_request *clock);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index fe549ac..29d1481 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -293,8 +293,7 @@ struct pp_hwmgr_func {
> int (*get_clock_by_type_with_voltage)(struct pp_hwmgr *hwmgr,
> enum amd_pp_clock_type type,
> struct pp_clock_levels_with_voltage *clocks);
> - int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr,
> - struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
> + int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
> int (*display_clock_voltage_request)(struct pp_hwmgr *hwmgr,
> struct pp_display_clock_request *clock);
> int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);
> --
> 1.9.1
>
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