On Thu, May 24, 2018 at 4:35 PM, Samuel Li <Samuel.Li at amd.com> wrote:
Please add a patch description. E.g.,
Document the GEM domains exposed to userspace.
A few comments below.
> Signed-off-by: Samuel Li <Samuel.Li at amd.com>
> ---
> include/uapi/drm/amdgpu_drm.h | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 5b007fa..a2ae752 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -75,6 +75,25 @@ extern "C" {
> #define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
> #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
>
> +/**
> + * memory domains
This should be:
* DOC: Memory Domains
> + *
> + * %AMDGPU_GEM_DOMAIN_CPU System memory
System memory that is not GPU accessible. Memory in this pool could
be swapped out to disk if there is pressure.
> + *
> + * %AMDGPU_GEM_DOMAIN_GTT Gart memory linearizes non-contiguous pages of
> + * system memory, allows GPU access system memory in a linezrized fashion
GPU accessible system memory. System memory mapped into the GPU's
virtual address space.
> + *
> + * %AMDGPU_GEM_DOMAIN_VRAM Local video memory. For APUs, it is memory
> + * carved out by BIOS
For APUs, it is system memory carved out by the BIOS.
> + *
> + * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
> + *
Global on-chip shader storage used to share data across shader threads.
> + * %AMDGPU_GEM_DOMAIN_GWS Global wave sync, used to synchronize the
> + * execution of all the waves on a device
> + *
> + * %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute engines
> + * for appending data
> + */
> #define AMDGPU_GEM_DOMAIN_CPU 0x1
> #define AMDGPU_GEM_DOMAIN_GTT 0x2
> #define AMDGPU_GEM_DOMAIN_VRAM 0x4
> --
> 2.7.4
>
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