Reviewed-by: James Zhu <James.Zhu at amd.com>
On 2018-05-17 06:36 PM, Alex Deucher wrote:
> Current multi-UVD hardware uses a single clock and power source
> so handle all instances in the idle handler.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index 0772680371a1..be2917c6698e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -1146,7 +1146,11 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
> {
> struct amdgpu_device *adev =
> container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
> - unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.inst->ring);
> + unsigned fences = 0, i;
> +
> + for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
> + fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring);
> + }
>
> if (fences == 0) {
> if (adev->pm.dpm_enabled) {
