[PATCH 4/6] drm/amdgpu: Add runtime vcn cg/pg enablement

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On Wed, May 16, 2018 at 8:53 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Please add a better patch description.  E.g.,

drm/amdgpu: Add runtime vcn cg/pg enablement

Enable support for dynamically powering up/down VCN on demand.

Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>


With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>


> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 19 ++++++++++++++-----
>  1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index 58e4953..8b0d491 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -208,9 +208,13 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)
>
>         if (fences == 0) {
>                 if (adev->pm.dpm_enabled) {
> -                       /* might be used when with pg/cg
>                         amdgpu_dpm_enable_uvd(adev, false);
> -                       */
> +               } else {
> +                       /* shutdown the UVD block */
> +                       amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
> +                                                              AMD_PG_STATE_GATE);
> +                       amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
> +                                                              AMD_CG_STATE_GATE);
>                 }
>         } else {
>                 schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
> @@ -223,9 +227,14 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
>         bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);
>
>         if (set_clocks && adev->pm.dpm_enabled) {
> -               /* might be used when with pg/cg
> -               amdgpu_dpm_enable_uvd(adev, true);
> -               */
> +               if (adev->pm.dpm_enabled) {
> +                       amdgpu_dpm_enable_uvd(adev, true);
> +               } else {
> +                       amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
> +                                                              AMD_CG_STATE_UNGATE);
> +                       amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,
> +                                                              AMD_PG_STATE_UNGATE);
> +               }
>         }
>  }
>
> --
> 1.9.1
>
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