[PATCH] drm/amd/display: Fix 64-bit division in hwss_edp_power_control

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On Tue, Apr 10, 2018 at 4:10 PM, Harry Wentland <harry.wentland at amd.com> wrote:
> Signed-off-by: Harry Wentland <harry.wentland at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> index f32ccdfd18a3..3ba057e2a467 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
> @@ -860,7 +860,7 @@ void hwss_edp_power_control(
>                                         dm_get_elapse_time_in_ns(
>                                                         ctx,
>                                                         current_ts,
> -                                                       link->link_trace.time_stamp.edp_poweroff) / 1000000;
> +                                                       div64_u64(link->link_trace.time_stamp.edp_poweroff, 1000000));
>                         unsigned long long wait_time_ms = 0;
>
>                         /* max 500ms from LCDVDD off to on */
> --
> 2.15.1
>
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