[PATCH] drm/amd/powerplay: get real current gfxclk frequency instead of dpm level value

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fix bug read wrong engine clock when in deep sleep.



Reviewed-by: Rex Zhu <Rex.Zhu at amd.com>


Best Regards

Rex


________________________________
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Evan Quan <evan.quan at amd.com>
Sent: Tuesday, April 10, 2018 1:08 PM
To: amd-gfx at lists.freedesktop.org
Cc: Quan, Evan; Zhu, Rex
Subject: [PATCH] drm/amd/powerplay: get real current gfxclk frequency instead of dpm level value

Change-Id: Ie9a684d018f9ed43e3baadc6ba2c7525da97d659
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 13 ++++---------
 drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h   |  1 +
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 5fc2f20..b8102c4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3799,7 +3799,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
                               void *value, int *size)
 {
         struct amdgpu_device *adev = hwmgr->adev;
-       uint32_t sclk_idx, mclk_idx, activity_percent = 0;
+       uint32_t sclk_mhz, mclk_idx, activity_percent = 0;
         struct vega10_hwmgr *data = hwmgr->backend;
         struct vega10_dpm_table *dpm_table = &data->dpm_table;
         int ret = 0;
@@ -3807,14 +3807,9 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,

         switch (idx) {
         case AMDGPU_PP_SENSOR_GFX_SCLK:
-               smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex);
-               sclk_idx = smum_get_argument(hwmgr);
-               if (sclk_idx <  dpm_table->gfx_table.count) {
-                       *((uint32_t *)value) = dpm_table->gfx_table.dpm_levels[sclk_idx].value;
-                       *size = 4;
-               } else {
-                       ret = -EINVAL;
-               }
+               smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetAverageGfxclkActualFrequency);
+               sclk_mhz = smum_get_argument(hwmgr);
+               *((uint32_t *)value) = sclk_mhz * 100;
                 break;
         case AMDGPU_PP_SENSOR_GFX_MCLK:
                 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex);
diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h
index c3ed737..715b5a1 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h
@@ -131,6 +131,7 @@ typedef uint16_t PPSMC_Result;
 #define PPSMC_MSG_RunAcgInOpenLoop               0x5E
 #define PPSMC_MSG_InitializeAcg                  0x5F
 #define PPSMC_MSG_GetCurrPkgPwr                  0x61
+#define PPSMC_MSG_GetAverageGfxclkActualFrequency 0x63
 #define PPSMC_MSG_SetPccThrottleLevel            0x67
 #define PPSMC_MSG_UpdatePkgPwrPidAlpha           0x68
 #define PPSMC_Message_Count                      0x69
--
2.7.4

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