I don't think this is the right approach. TTMPs are really just SGPRs. They're only special because access to them is restricted to trap handlers. Note how the index ixSQ_WAVE_TTMP0 is 0x26c. 0x200 is the base for reading SGPRs, and 0x6c is the operand encoding of TTMP0. I think umr should just use the SGPR read path with the correct index. Thanks, Nicolai On 06.04.2018 16:51, Tom St Denis wrote: > Patches attached for both umr/kernel. > > Tested on my Raven1. I'll circle back to adding gfx8 after lunch. > > Tom > > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > -- Lerne, wie die Welt wirklich ist, Aber vergiss niemals, wie sie sein sollte.