On Mon, Apr 2, 2018 at 6:19 AM, Emily Deng <Emily.Deng at amd.com> wrote:
> As the tlb flush commands are combined to one command
> now, so need to modify the emit frame size.
>
> Signed-off-by: Emily Deng <Emily.Deng at amd.com>
I've reverted the patches. They seem to regress other gfx9 parts.
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 566b7eb..f388764 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -4379,7 +4379,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = {
> .emit_frame_size = /* totally 242 maximum if 16 IBs */
> 5 + /* COND_EXEC */
> 7 + /* PIPELINE_SYNC */
> - SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
> + (SOC15_FLUSH_GPU_TLB_NUM_WREG - 1) * 5 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
> 2 + /* VM_FLUSH */
> 8 + /* FENCE for VM_FLUSH */
> @@ -4432,7 +4432,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = {
> 7 + /* gfx_v9_0_ring_emit_hdp_flush */
> 5 + /* gfx_v9_0_ring_emit_hdp_invalidate */
> 7 + /* gfx_v9_0_ring_emit_pipeline_sync */
> - SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
> + (SOC15_FLUSH_GPU_TLB_NUM_WREG - 1) * 5 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
> 2 + /* gfx_v9_0_ring_emit_vm_flush */
> 8 + 8 + 8, /* gfx_v9_0_ring_emit_fence x3 for user fence, vm fence */
> @@ -4468,7 +4468,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {
> 7 + /* gfx_v9_0_ring_emit_hdp_flush */
> 5 + /* gfx_v9_0_ring_emit_hdp_invalidate */
> 7 + /* gfx_v9_0_ring_emit_pipeline_sync */
> - SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
> + (SOC15_FLUSH_GPU_TLB_NUM_WREG - 1) * 5 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
> 2 + /* gfx_v9_0_ring_emit_vm_flush */
> 8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence, vm fence */
> --
> 2.7.4
>
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